EVAL-AD7450ASDZ Analog Devices, EVAL-AD7450ASDZ Datasheet
EVAL-AD7450ASDZ
Specifications of EVAL-AD7450ASDZ
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EVAL-AD7450ASDZ Summary of contents
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... Rev. C Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. ...
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... Changes to Table 2 footnotes ............................................................. 5 Changes to Table 3 footnotes ............................................................. 7 Digital Inputs .............................................................................. 19 Reference ..................................................................................... 19 Single-Ended Operation............................................................ 20 Serial Interface ............................................................................ 21 Modes of Operation ....................................................................... 23 Normal Mode.............................................................................. 23 Power-Down Mode .................................................................... 23 Power-Up Time .......................................................................... 24 Power vs. Throughput Rate....................................................... 24 Microprocessor and DSP Interfacing ...................................... 25 Grounding and Layout Hints.................................................... 26 Evaluating the AD7440/AD7450A Performance................... 26 Outline Dimensions ....................................................................... 27 Ordering Guide............................................................................... 28 Rev Page ...
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AD7440–SPECIFICATIONS Table 2 3 MHz SCLK 2 REF CM REF A MIN Parameter DYNAMIC PERFORMANCE Signal-to-(Noise ...
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AD7440/AD7450A Parameter CONVERSION RATE Conversion Time 2 Track-and-Hold Acquisition Time Throughput Rate POWER REQUIREMENTS Normal Mode (Static) Normal Mode (Operational) Full Power-Down Mode Power Dissipation Normal Mode (Operational) Full Power-Down Mode 1 Common-mode voltage. The ...
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AD7450A–SPECIFICATIONS Table 2 3 MHz SCLK 2 REF CM REF A MIN Parameter DYNAMIC PERFORMANCE Signal-to-(Noise ...
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AD7440/AD7450A Parameter CONVERSION RATE Conversion Time 2 Track-and-Hold Acquisition Time Throughput Rate POWER REQUIREMENTS Normal Mode (Static) Normal Mode (Operational) Full Power-Down Mode Power Dissipation Normal Mode (Operational) Full Power-Down 1 Common-mode voltage. The input ...
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TIMING SPECIFICATIONS Guaranteed by characterization. All input signals are specified with (10 1.6 V. See Figure 2, Figure 3, and the Serial Interface section. Table 2.7 V ...
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AD7440/AD7450A ABSOLUTE MAXIMUM RATINGS T = 25°C, unless otherwise noted. A Table 4. Parameter V to GND GND IN GND IN– Digital Input Voltage to GND Digital Output Voltage to GND V to GND REF ...
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PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS AD7440/ SCLK 2 7 AD7450A SDATA 3 6 TOP VIEW CS (Not to Scale Figure 5. Pin Configuration for 8-Lead SOT-23 Table 5. Pin Function Descriptions Mnemonic Function V ...
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AD7440/AD7450A TERMINOLOGY Signal-to-(Noise + Distortion) Ratio This is the measured ratio of signal to (noise + distortion) at the output of the ADC. The signal is the rms amplitude of the fundamental. Noise is the sum of all nonfundamental signals ...
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Power Supply Rejection Ratio (PSRR) The power supply rejection ratio is the ratio of the power in the ADC output at full-scale frequency the power of a 100 mV p-p sine wave applied to the ADC V frequency ...
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AD7440/AD7450A AD7440/AD7450A–TYPICAL PERFORMANCE CHARACTERISTICS T = 25° MSPS MHz, unless otherwise noted SCLK 100 FREQUENCY (kHz) Figure 7. AD7450A SINAD vs. Analog Input Frequency ...
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POSITIVE DNL 0.5 0 –0.5 NEGATIVE DNL –1.0 0 0.5 1.0 1.5 2.0 2.5 V (V) REF Figure 13. Change in DNL vs. V for the AD7450A for V REF 2.5 2.0 1.5 1.0 POSITIVE ...
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AD7440/AD7450A 10,000 10,000 IN+ IN– CODES 10,000 CONVERSIONS 9,000 f = 1MSPS S 8,000 7,000 6,000 5,000 4,000 3,000 2,000 1,000 0 2044 2045 2046 2047 CODE Figure 19. Histogram of 10,000 Conversions Input ...
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CIRCUIT INFORMATION The AD7440/AD7450A are 10-bit and 12-bit fast, low power, single-supply, successive approximation analog-to-digital converters (ADCs). They can operate with power supply and are capable of throughput rates MSPS when ...
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AD7440/AD7450A TYPICAL CONNECTION DIAGRAM Figure 26 shows a typical connection diagram for the AD7440/AD7450A for both 5 V and 3 V supplies. In this setup, the GND pin is connected to the analog ground plane of the system. The V ...
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Figure 30 shows examples of the inputs to V different values of V for also gives the maximum REF DD and minimum common-mode voltages for each reference value according to Figure 28. REFERENCE = 2V ...
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AD7440/AD7450A DRIVING DIFFERENTIAL INPUTS Differential operation requires V and V IN+ simultaneously with two equal signals that are 180° out of phase. The common mode must be set up externally and has a range determined the power ...
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Op Amp Pair An op amp pair can be used to directly couple a differential signal to the AD7440/AD7450A. The circuit configurations shown in Figure 35 and Figure 36 show how a dual op amp can be used to convert ...
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AD7440/AD7450A Example 1 V max = max = REF REF then V max = 5 Therefore 3 × ...
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SERIAL INTERFACE Figure 2 and Figure 3 show detailed timing diagrams for the serial interface of the AD7450A and the AD7440, respectively. The serial clock provides the conversion clock and also controls the transfer of data from the devices during ...
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AD7440/AD7450A Timing Example 1 Having MHz and a throughput rate of 1 MSPS gives a SCLK cycle time of 1/Throughput = 1/1,000,000 = 1 μs A cycle consists 12.5(1 ...
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MODES OF OPERATION The operational mode of the AD7440/AD7450A is selected by controlling the logic state of the CS signal during a conversion. There are two possible modes of operation, normal and power pulled high after the conversion ...
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AD7440/AD7450A brought high before the 10th falling edge of SCLK, the AD7440/AD7450A again goes back into power-down. This avoids accidental power-up due to glitches on the CS line or an inadvertent burst of eight SCLK cycles while ...
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Thus, the average power dissipated during each cycle with a throughput rate of 100 kSPS is (2/10) × 0.8 mW. This is how the power numbers in Figure 44 are calculated. For throughput rates above 320 kSPS, ...
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... The evaluation board controller can be used in conjunction with the AD7440/AD7450A evaluation board, as well as many other Analog Devices evaluation boards ending with the CB designator, to demonstrate and evaluate the ac and dc performance of the AD7440/AD7450A. DSP56xxx* The software allows the user to perform ac (fast Fourier SCLK transform) and dc (histogram of codes) tests on the device ...
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OUTLINE DIMENSIONS INDICATOR 0.15 MAX 2.90 BSC 1.60 BSC 2.80 BSC PIN 1 0.65 BSC 1.95 1.30 BSC 1.15 0.90 1.45 MAX 0.22 0.08 0.38 SEATING 0.22 PLANE COMPLIANT TO JEDEC STANDARDS ...
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... Evaluation board controller. This board is a complete unit allowing control and communicate with all Analog Devices’ evaluation boards ending in the CB designator. For a complete evaluation kit, order the ADC evaluation board (that is, the EVAL-AD7450ACB or EVAL-AD7440CB), the EVAL-CONTROL BRD2, and transformer. See the AD7440/AD7450A application note that accompanies the evaluation kit for more information. © ...