MT48LC8M16A2P-75:G Micron Technology Inc, MT48LC8M16A2P-75:G Datasheet - Page 54

• Manufacturer Part Number: MT48LC8M16A2P-75:G
• Description: IC SDRAM 128MBIT 133MHZ 54TSOP
• Manufacturer: Micron Technology Inc
• Type: SDRAMr

Specifications of MT48LC8M16A2P-75:G

• Memory Type: SDRAM
• Format - Memory: RAM
• Memory Size: 128M (8Mx16)
• Speed: 133MHz
• Interface: Parallel
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 54-TSOP II
• Memory Configuration: 16M X 8
• Access Time: 5.4ns
• Page Size: 128Mbit
• Memory Case Style: TSOP
• No. Of Pins: 54
• Operating Temperature Range: 0°C To +70°C
• Organization: 8Mx16
• Density: 128Mb
• Address Bus: 14b
• Access Time (max): 6/5.4ns
• Maximum Clock Rate: 133MHz
• Operating Supply Voltage (typ): 3.3V
• Package Type: TSOP-II
• Operating Temp Range: 0C to 70C
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• Supply Current: 150mA
• Pin Count: 54
• Mounting: Surface Mount
• Operating Temperature Classification: Commercial
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Compliant, Lead free / RoHS Compliant

Figure 38:
PDF: 09005aef8091e66d/Source: 09005aef8091e625
128MSDRAM_2.fm - Rev. N 1/09 EN
DQML, DQMH
COMMAND
A0–A9, A11
Precharge all
DQM /
BA0, BA1
active banks
CKE
CLK
A10
DQ
Power-Down Mode
t CMS
High-Z
t CKS
t AS
SINGLE BANK
PRECHARGE
ALL BANKS
Notes:
BANK(S)
T0
t CKH
t CMH
t AH
1. Violating refresh requirements during power-down may result in a loss of data.
Two clock cycles
All banks idle, enter
power-down mode
t CK
T1
NOP
t CKS
t CL
T2
NOP
Input buffers gated off while in
power-down mode
t CH
54
Exit power-down mode
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Micron Technology, Inc., reserves the right to change products or specifications without notice.
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128Mb: x4, x8, x16 SDRAM
t CKS
Tn + 1
NOP
All banks idle
©1999 Micron Technology, Inc. All rights reserved.
Timing Diagrams
Tn + 2
ACTIVE
ROW
ROW
BANK
DON’T CARE