MT46H4M32LFB5-5 IT:K Micron Technology Inc, MT46H4M32LFB5-5 IT:K Datasheet - Page 37
MT46H4M32LFB5-5 IT:K
Manufacturer Part Number
MT46H4M32LFB5-5 IT:K
Description
IC DDR SDRAM 128MBIT 90VFBGA
Manufacturer
Micron Technology Inc
Datasheet
1.MT46H4M32LFB5-5_ITK.pdf
(94 pages)
Specifications of MT46H4M32LFB5-5 IT:K
Format - Memory
RAM
Memory Type
Mobile DDR SDRAM
Memory Size
128M (4Mx32)
Speed
200MHz
Interface
Parallel
Voltage - Supply
1.7 V ~ 1.95 V
Operating Temperature
-40°C ~ 85°C
Package / Case
90-VFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- Current page: 37 of 94
- Download datasheet (4Mb)
Figure 11: WRITE Command
PRECHARGE
PDF: 09005aef8331b3e9
128mb_mobile_ddr_sdram_t35m.pdf - Rev. F 03/10 EN
Note:
BA0, BA1
The PRECHARGE command is used to deactivate the open row in a particular bank or
the open row in all banks. The bank(s) will be available for a subsequent row access a
specified time (
whether one or all banks will be precharged, and in the case where only one bank is
precharged, inputs BA0 and BA1 select the bank. Otherwise, BA0 and BA1 are treated as
“Don’t Care.” After a bank has been precharged, it is in the idle state and must be activa-
ted prior to any READ or WRITE commands being issued to that bank.
Address
1. EN AP = enable auto precharge; DIS AP = disable auto precharge.
RAS#
CAS#
WE#
CK#
CKE
A10
CS#
CK
HIGH
t
RP) after the PRECHARGE command is issued. Input A10 determines
Column
DIS AP
EN AP
Bank
Don’t Care
37
128Mb: x16, x32 Mobile LPDDR SDRAM
Micron Technology, Inc. reserves the right to change products or specifications without notice.
© 2007 Micron Technology, Inc. All rights reserved.
Commands
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