MT48LC32M8A2P-7E:D Micron Technology Inc, MT48LC32M8A2P-7E:D Datasheet - Page 25

IC SDRAM 256MBIT 133MHZ 54TSOP

MT48LC32M8A2P-7E:D

Manufacturer Part Number
MT48LC32M8A2P-7E:D
Description
IC SDRAM 256MBIT 133MHZ 54TSOP
Manufacturer
Micron Technology Inc
Type
SDRAMr
Datasheet

Specifications of MT48LC32M8A2P-7E:D

Package / Case
54-TSOP II
Format - Memory
RAM
Memory Type
SDRAM
Memory Size
256M (32M x 8)
Speed
133MHz
Interface
Parallel
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
0°C ~ 70°C
Access Time
RoHS Compliant
Memory Case Style
TSOP
No. Of Pins
54
Operating Temperature Range
0°C To +70°C
Operating Temperature Max
70°C
Operating Temperature Min
0°C
Organization
32Mx8
Density
256Mb
Address Bus
15b
Access Time (max)
5.4ns
Maximum Clock Rate
143MHz
Operating Supply Voltage (typ)
3.3V
Package Type
TSOP-II
Operating Temp Range
0C to 70C
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
Supply Current
135mA
Pin Count
54
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Memory Configuration
4 BLK (8M X 8)
Interface Type
LVTTL
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
PDF: 09005aef8091e6d1
256Mb_sdr.pdf - Rev. N 1/10 EN
10. Address transitions average one transition every two clocks.
11. PC100 specifies a maximum of 4pF.
12. PC100 specifies a maximum of 5pF.
13. For -75, CL = 3 and tCK = 7.5ns; for -7E, CL = 2 and tCK = 7.5ns.
14. CKE is HIGH during REFRESH command period
5. I
6. I
7. Enables on-chip refresh and address counters.
8. Other input signals are allowed to transition no more than once every two clocks and
9. The I
measured from V
always be 1.5V referenced to crossover. Refer to Micron technical note TN-48-09.
minimum cycle time and the outputs open.
are otherwise at valid V
quency alteration for the test condition.
is actually a nominal value and does not result in a fail value.
DD
DD
specifications are tested after the device is properly initialized.
is dependent on output loading and cycle rates. Specified values are obtained with
DD
current will increase or decrease proportionally according to the amount of fre-
IL, max
and V
IH
25
or V
Electrical Specifications – I
IH,min
IL
levels.
and no longer from the 1.5V midpoint. CLK should
Micron Technology, Inc. reserves the right to change products or specifications without notice.
t
RFC (MIN) else CKE is LOW. The I
256Mb: x4, x8, x16 SDRAM
© 1999 Micron Technology, Inc. All rights reserved.
DD
Parameters
DD6
limit

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