MT48LC32M8A2P-7E:D Micron Technology Inc, MT48LC32M8A2P-7E:D Datasheet - Page 78

IC SDRAM 256MBIT 133MHZ 54TSOP

MT48LC32M8A2P-7E:D

Manufacturer Part Number
MT48LC32M8A2P-7E:D
Description
IC SDRAM 256MBIT 133MHZ 54TSOP
Manufacturer
Micron Technology Inc
Type
SDRAMr
Datasheet

Specifications of MT48LC32M8A2P-7E:D

Package / Case
54-TSOP II
Format - Memory
RAM
Memory Type
SDRAM
Memory Size
256M (32M x 8)
Speed
133MHz
Interface
Parallel
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
0°C ~ 70°C
Access Time
RoHS Compliant
Memory Case Style
TSOP
No. Of Pins
54
Operating Temperature Range
0°C To +70°C
Operating Temperature Max
70°C
Operating Temperature Min
0°C
Organization
32Mx8
Density
256Mb
Address Bus
15b
Access Time (max)
5.4ns
Maximum Clock Rate
143MHz
Operating Supply Voltage (typ)
3.3V
Package Type
TSOP-II
Operating Temp Range
0C to 70C
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
Supply Current
135mA
Pin Count
54
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Memory Configuration
4 BLK (8M X 8)
Interface Type
LVTTL
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Command
Figure 48: WRITE Without Auto Precharge
PDF: 09005aef8091e6d1
256Mb_sdr.pdf - Rev. N 1/10 EN
BA0, BA1
Address
DQM
CKE
A10
CLK
DQ
t CMS
t CKS
t AS
t AS
t AS
Bank
ACTIVE
Row
Row
T0
t CKH
t CMH
t AH
t AH
t AH
t RCD
t RAS
t RC
t CK
Note:
T1
NOP
Disable auto precharge
1. For this example, BL = 4 and the WRITE burst is followed by a manual PRECHARGE.
t CMS
t CL
Column m
t DS
WRITE
Bank
T2
D
IN
t CMH
t DH
t CH
t DS
T3
NOP
D
IN
t DH
t DS
T4
NOP
D
IN
t DH
78
t DS
NOP
T5
D
IN
t DH
Micron Technology, Inc. reserves the right to change products or specifications without notice.
t WR
NOP
T6
256Mb: x4, x8, x16 SDRAM
PRECHARGE
Single bank
All banks
PRECHARGE Operation
Bank
T7
© 1999 Micron Technology, Inc. All rights reserved.
t RP
NOP
T8
ACTIVE
Row
Row
Bank
T9
Don’t Care

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