MT48LC4M32B2P-7:G Micron Technology Inc, MT48LC4M32B2P-7:G Datasheet - Page 61

• Manufacturer Part Number: MT48LC4M32B2P-7:G
• Description: IC SDRAM 128MBIT 143MHZ 86TSOP
• Manufacturer: Micron Technology Inc
• Type: SDRAMr

Specifications of MT48LC4M32B2P-7:G

• Format - Memory: RAM
• Memory Type: SDRAM
• Memory Size: 128M (4Mx32)
• Speed: 143MHz
• Interface: Parallel
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 86-TSOPII
• Organization: 4Mx32
• Density: 128Mb
• Address Bus: 14b
• Access Time (max): 17/8/5.5ns
• Maximum Clock Rate: 143MHz
• Operating Supply Voltage (typ): 3.3V
• Package Type: TSOP-II
• Operating Temp Range: 0C to 70C
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• Supply Current: 175mA
• Pin Count: 86
• Mounting: Surface Mount
• Operating Temperature Classification: Commercial
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Figure 44:
PDF: 09005aef80872800/Source: 09005aef80863355
128MbSDRAMx32_2.fm - Rev. L 1/09 EN
COMMAND
A0–A9, A11
BA0, BA1
DQM0–3
CKE
A10
CLK
DQ
t CMS
t CKS
t AS
t AS
t AS
Write – Without Auto Precharge
ACTIVE
T0
ROW
ROW
BANK
t CKH
t CMH
t AH
t AH
t AH
Notes:
t RCD
t RAS
t RC
t CK
T1
NOP
1. For this example, BL = 4, and the WRITE burst is followed by a “manual” PRECHARGE.
2. Faster frequencies require two clocks (when
3. A8, A9, and A11 = “Don’t Care.”
4.
t
WR of 1 CLK available if running 100 MHz or slower. Check factory for availability.
DISABLE AUTO PRECHARGE
t CMS
t CL
t DS
COLUMN m 3
WRITE
BANK
T2
D
IN
t CMH
t CH
t DH
m
t DS
D
IN
T3
NOP
m + 1
t DH
t DS
61
D
IN
T4
NOP
m + 2
t DH
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t DS
D
IN
T5
NOP
m + 3
t DH
t
WR >
t WR
SINGLE BANK
PRECHARGE
t
2
ALL BANKs
CK).
BANK
T6
©2001 Micron Technology, Inc. All rights reserved.
128Mb: x32 SDRAM
NOP
t RP
T7
Timing Diagrams
ACTIVE
ROW
ROW
BANK
T8
DON’T CARE
UNDEFINED