MT46V32M16TG-6T IT:F TR Micron Technology Inc, MT46V32M16TG-6T IT:F TR Datasheet - Page 8
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MT46V32M16TG-6T IT:F TR
Manufacturer Part Number
MT46V32M16TG-6T IT:F TR
Description
IC DDR SDRAM 512MBIT 6NS 66TSOP
Manufacturer
Micron Technology Inc
Type
DDR SDRAMr
Datasheet
1.MT46V32M16P-5BF_TR.pdf
(91 pages)
Specifications of MT46V32M16TG-6T IT:F TR
Format - Memory
RAM
Memory Type
DDR SDRAM
Memory Size
512M (32Mx16)
Speed
6ns
Interface
Parallel
Voltage - Supply
2.3 V ~ 2.7 V
Operating Temperature
-40°C ~ 85°C
Package / Case
66-TSOP
Organization
32Mx16
Density
512Mb
Address Bus
15b
Access Time (max)
700ps
Maximum Clock Rate
333MHz
Operating Supply Voltage (typ)
2.5V
Package Type
TSOP
Operating Temp Range
-40C to 85C
Operating Supply Voltage (max)
2.7V
Operating Supply Voltage (min)
2.3V
Supply Current
195mA
Pin Count
66
Mounting
Surface Mount
Operating Temperature Classification
Industrial
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Figure 4:
Figure 5:
PDF: 09005aef80a1d9d4/Source: 09005aef82a95a3a
512Mb_DDR_x4x8x16_D2.fm - 512Mb DDR: Rev. N; Core DDR Rev. B 2/09 EN
64 Meg x 8 Functional Block Diagram
32 Meg x 16 Functional Block Diagram
BA0, BA1
A0–A12,
RAS#
CAS#
WE#
CKE
CK#
CS#
CK
BA0, BA1
15
A0–A12,
CAS#
RAS#
WE#
ADDRESS
REGISTER
CKE
CK#
CS#
CK
MODE REGISTERS
CONTROL
15
LOGIC
15
ADDRESS
REGISTER
MODE REGISTERS
CONTROL
LOGIC
COUNTER
15
REFRESH
13
11
2
13
13
ADDRESS
2
ROW-
MUX
10
COUNTER
REFRESH
ADDRESS
2
2
ROW-
MUX
13
COUNTER/
CONTROL
COLUMN-
ADDRESS
LOGIC
LATCH
BANK
13
COUNTER/
CONTROL
COLUMN-
ADDRESS
LATCH
LOGIC
13
BANK
DECODER
ADDRESS
BANK0
LATCH
ROW-
&
10
1
DECODER
ADDRESS
BANK0
LATCH
ROW-
&
8
8192
9
1
8192
(8,192 x 1,024 x 16)
SENSE AMPLIFIERS
DM MASK LOGIC
I/O GATING
DECODER
COLUMN
MEMORY
BANK0
ARRAY
16384
1024
(x16)
SENSE AMPLIFIERS
BANK1
DM MASK LOGIC
(8,192 x 512 x 32)
I/O GATING
DECODER
MEMORY
COLUMN
Micron Technology, Inc., reserves the right to change products or specifications without notice.
BANK0
ARRAY
16384
(x32)
512
BANK2
BANK1
BANK3
BANK2
16
BANK3
512Mb: x4, x8, x16 DDR SDRAM
32
16
32
16
LATCH
32
READ
Functional Block Diagrams
LATCH
READ
Out
Out
CK
CK
CK
CK
DRIVERS
DRIVERS
WRITE
WRITE
FIFO
FIFO
&
8
8
&
16
16
CK
CK
In
In
COL0
COL0
MUX
MUX
COL0
COL0
MASK
MASK
DATA
DATA
16
32
2
4
©2000 Micron Technology, Inc. All rights reserved.
GENERATOR
1
1
8
8
2
2
16
16
GENERATOR
REGISTERS
REGISTERS
DQS
16
INPUT
INPUT
DQS
8
DATA
1
1
8
8
2
2
16
16
DATA
2
1
1
8
2
16
DQS
DRVRS
CK
1
DLL
DRVRS
DQS
2
CK
DLL
RCVRS
RCVRS
DQ0–DQ15
LDQS, UDQS
LDM, UDM
DQ0–DQ7
DQS
DM