MT48V8M16LFB4-8:G Micron Technology Inc, MT48V8M16LFB4-8:G Datasheet - Page 69

IC SDRAM 128MBIT 125MHZ 54VFBGA

MT48V8M16LFB4-8:G

Manufacturer Part Number
MT48V8M16LFB4-8:G
Description
IC SDRAM 128MBIT 125MHZ 54VFBGA
Manufacturer
Micron Technology Inc
Type
Mobile SDRAMr

Specifications of MT48V8M16LFB4-8:G

Format - Memory
RAM
Memory Type
Mobile SDRAM
Memory Size
128M (8Mx16)
Speed
125MHz
Interface
Parallel
Voltage - Supply
2.3 V ~ 2.7 V
Operating Temperature
0°C ~ 70°C
Package / Case
54-VFBGA
Organization
8Mx16
Density
128Mb
Address Bus
14b
Access Time (max)
19/8/7ns
Maximum Clock Rate
125MHz
Operating Supply Voltage (typ)
2.5V
Package Type
VFBGA
Operating Temp Range
0C to 70C
Operating Supply Voltage (max)
2.7V
Operating Supply Voltage (min)
2.3V
Supply Current
100mA
Pin Count
54
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MT48V8M16LFB4-8:G
Manufacturer:
MICRON
Quantity:
4 000
Part Number:
MT48V8M16LFB4-8:G
Manufacturer:
Micron Technology Inc
Quantity:
10 000
Part Number:
MT48V8M16LFB4-8:G TR
Manufacturer:
Micron Technology Inc
Quantity:
10 000
Figure 48:
PDF: 09005aef807f4885/Source: 09005aef8071a76b
128Mbx16x32Mobile_2.fm - Rev. M 1/09 EN
DQMU, DQML
A0–A9, A11
COMMAND
BA0, BA1
CKE
A10
CLK
DQ
t CKS
t CMS
t AS
t AS
t AS
ACTIVE
BANK
T0
ROW
ROW
Read – Full-Page Burst
t CKH
t CMH
t AH
t AH
t AH
t CK
t RCD
Notes:
T1
NOP
1. For this example, CL = 2.
2. x16: A9 and A11 = “Don’t Care.”
3. Page left open; no
x32: A8, A9, and A11 = “Don’t Care.”
See Table 17 on page 53.
t CMS
t CL
COLUMN m 2
T2
BANK
READ
t CMH
t CH
CAS Latency
T3
NOP
t LZ
t AC
t
RP.
T4
D
NOP
OUT
t OH
512 (x16) locations within same row
m
69
t AC
Full-page burst does not self-terminate.
Can use BURST TERMINATE command.
D
T5
OUT
NOP
t OH
m+1
Micron Technology, Inc., reserves the right to change products or specifications without notice.
Full page completed
t AC
D
T6
OUT
128Mb: x16, x32 Mobile SDRAM
NOP
t OH
t AC
m+2
(
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(
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(
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)
(
(
(
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Tn + 1
D
NOP
OUT
t OH
m-1
t AC
©2001 Micron Technology, Inc. All rights reserved.
BURST TERM
Tn + 2
3
Timing Diagrams
D
OUT
UNDEFINED
t OH
m
t AC
Tn + 3
D
OUT
NOP
t OH
m+1
t HZ
DON’T CARE
Tn + 4
NOP

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