MT29F2G08ABAEAH4-IT:E Micron Technology Inc, MT29F2G08ABAEAH4-IT:E Datasheet - Page 28

• Manufacturer Part Number: MT29F2G08ABAEAH4-IT:E
• Description: IC FLASH 2G 3.3V SLC 63VFBGA
• Manufacturer: Micron Technology Inc

Specifications of MT29F2G08ABAEAH4-IT:E

• Format - Memory: FLASH
• Memory Type: FLASH - Nand
• Memory Size: 2G (256M x 8)
• Interface: Parallel
• Voltage - Supply: 2.7 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 63-VFBGA
• Cell Type: NAND
• Density: 2Gb
• Interface Type: Parallel
• Address Bus: 28b
• Operating Supply Voltage (typ): 3.3V
• Operating Temp Range: -40C to 85C
• Package Type: VFBGA
• Sync/async: Asynchronous
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (max): 3.6V
• Word Size: 8b
• Number Of Words: 256M
• Supply Current: 35mA
• Mounting: Surface Mount
• Pin Count: 63
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Speed: -
• Lead Free Status / Rohs Status: Compliant

Device Initialization
Figure 22: R/B# Power-On Behavior
PDF: 09005aef83b83f42
m69a_2gb_nand.pdf – Rev. H 09/10 EN
V
R/B#
CC
V
CC
V
CC
Micron NAND Flash devices are designed to prevent data corruption during power tran-
sitions. V
protection during power transitions.) When ramping V
to initialize the device:
starts
= V
ramp
1. Ramp V
2. The host must wait for R/B# to be valid and HIGH before issuing RESET (FFh) to
3. If not monitoring R/B#, the host must wait at least 100µs after V
4. The asynchronous interface is active by default for each target. Each LUN draws
5. The RESET (FFh) command must be the first command issued to all targets (CE#s)
6. The device is now initialized and ready for normal operation.
CC
(MIN)
any target. The R/B# signal becomes valid when 50µs has elapsed since the begin-
ning the V
(MIN). If monitoring R/B#, the host must wait until R/B# is HIGH.
less than an average of 10mA (I
(FFh) command is issued.
after the NAND Flash device is powered on. Each target will be busy for 1ms after a
RESET command is issued. The RESET busy time can be monitored by polling R/
B# or issuing the READ STATUS (70h) command to poll the status register.
50µs (MIN)
CC
is internally monitored. (The WP# signal supports additional hardware
(MAX)
CC
10µs
.
CC
ramp, and 10µs has elapsed since V
28
100µs (MAX)
ST
) measured over intervals of 1ms until the RESET
Micron Technology, Inc. reserves the right to change products or specifications without notice.
2Gb: x8, x16 NAND Flash Memory
CC
CC
reaches V
, use the following procedure
Device Initialization
© 2009 Micron Technology, Inc. All rights reserved.
CC
(MIN).
CC
Reset (FFh)
Invalid
is issued
reaches V
CC