CY7C1355B-100AC Cypress Semiconductor Corp, CY7C1355B-100AC Datasheet - Page 19

IC SRAM 9MBIT 100MHZ 100LQFP

CY7C1355B-100AC

Manufacturer Part Number
CY7C1355B-100AC
Description
IC SRAM 9MBIT 100MHZ 100LQFP
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CY7C1355B-100AC

Format - Memory
RAM
Memory Type
SRAM - Synchronous
Memory Size
9M (256K x 36)
Speed
100MHz
Interface
Parallel
Voltage - Supply
3.135 V ~ 3.6 V
Operating Temperature
0°C ~ 70°C
Package / Case
100-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
428-1501

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY7C1355B-100AC
Manufacturer:
CY
Quantity:
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Part Number:
CY7C1355B-100AC
Manufacturer:
Cypress Semiconductor Corp
Quantity:
10 000
Document #: 38-05117 Rev. *C
Identification Register Definitions
Identification Codes
Scan Register Sizes
Revision Number (31:29)
Device Depth (28:24)
Device Width (23:18)
Cypress Device ID (17:12)
Cypress JEDEC ID Code (11:1)
ID Register Presence Indicator (0)
EXTEST
IDCODE
SAMPLE Z
RESERVED
SAMPLE/PRELOAD
RESERVED
RESERVED
BYPASS
Instruction
Bypass
ID
Boundary Scan Order
Instruction
Instruction Field
Register Name
Code
000
001
010
011
100
101
110
111
Captures I/O ring contents. Places the boundary scan register between TDI and TDO.
Forces all SRAM outputs to High-Z state. This instruction is not 1149.1 compliant.
Loads the ID register with the vendor ID code and places the register between TDI and
TDO. This operation does not affect SRAM operations.
Captures I/O ring contents. Places the boundary scan register between TDI and TDO.
Forces all SRAM output drivers to a High-Z state.
Do Not Use: This instruction is reserved for future use.
Captures I/O ring contents. Places the boundary scan register between TDI and TDO.
Does not affect SRAM operation. This instruction does not implement 1149.1 preload func-
tion and is therefore not 1149.1 compliant.
Do Not Use: This instruction is reserved for future use.
Do Not Use: This instruction is reserved for future use.
Places the bypass register between TDI and TDO. This operation does not affect SRAM
operations.
00000110100
CY7C1355B
(256KX36)
000000
100110
01010
001
1
Bit Size (x36)
00000110100
CY7C1357B
(512KX18)
000000
010110
32
71
01010
3
1
001
1
Description
Describes the version number
Defines memory type and architecture
Reserved for Internal Use
Defines width and density
Allows unique identification of SRAM vendor
Indicates the presence of an ID register
Description
Bit Size (x18)
32
71
3
1
CY7C1355B
CY7C1357B
Page 19 of 32

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