AT25640AN-10SU-2.7 Atmel, AT25640AN-10SU-2.7 Datasheet

IC EEPROM 64KBIT 20MHZ 8SOIC

AT25640AN-10SU-2.7

Manufacturer Part Number
AT25640AN-10SU-2.7
Description
IC EEPROM 64KBIT 20MHZ 8SOIC
Manufacturer
Atmel
Datasheet

Specifications of AT25640AN-10SU-2.7

Format - Memory
EEPROMs - Serial
Memory Type
EEPROM
Memory Size
64K (8K x 8)
Speed
10MHz, 20MHz
Interface
SPI, 3-Wire Serial
Voltage - Supply
2.7 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
AT25640AN-10SU2.7

Available stocks

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Price
Part Number:
AT25640AN-10SU-2.7
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Quantity:
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Features
Description
The AT25080A/160A/320A/640A provides 8192/16384/32768/65536 bits of serial
electrically-erasable programmable read-only memory (EEPROM) organized as
1024/2048/4096/8192 words of 8 bits each. The device is optimized for use in many
industrial and commercial applications where low-power and low-voltage operation
are essential. The AT25080A/160A/320A/640A is available in space-saving 8-lead
PDIP, 8-lead JEDEC SOIC, 8-lead MAP, 8-lead Ultra Thin Mini-MAP (MLP 2x3), 8-
lead TSSOP and 8-Lead Ultra Leadframe Land Grid Array (ULLGA) packages.
The AT25080A/160A/320A/640A is enabled through the Chip Select pin (CS) and
accessed via a three-wire interface consisting of Serial Data Input (SI), Serial Data
Output (SO), and Serial Clock (SCK). All programming cycles are completely self-
timed, and no separate erase cycle is required before write.
Serial Peripheral Interface (SPI) Compatible
Supports SPI Modes 0 (0,0) and 3 (1,1)
Low-voltage and Standard-voltage Operation
20 MHz Clock Rate (5V)
32-byte Page Mode
Block Write Protection
Write Protect (WP) Pin and Write Disable Instructions for Both Hardware and Software
Data Protection
Self-timed Write Cycle (5 ms max)
High Reliability
Available in Automotive
8-lead JEDEC PDIP, 8-lead JEDEC SOIC, 8-lead TSSOP, 8-lead MAP, 8-lead Ultra Thin
Mini-MAP (MLP 2x3) and 8-lead TSSOP Packages
Die Sales: Wafer Form, Tape and Reel, and Bumped Wafers
– Datasheet Describes Mode 0 Operation
– 2.7 (V
– 1.8 (V
– Protect 1/4, 1/2, or Entire Array
– Endurance: One Million Write Cycles
– Data Retention: 100 Years
CC
CC
= 2.7V to 5.5V)
= 1.8V to 5.5V)
SPI Serial
EEPROMs
8K (1024 x 8)
16K (2048 x 8)
32K (4096 x 8)
64K (8192 x 8)
AT25080A
AT25160A
AT25320A
AT25640A
Not
Recommended
for New Design
3347M–SEEPR–06/07

Related parts for AT25640AN-10SU-2.7

AT25640AN-10SU-2.7 Summary of contents

Page 1

... Die Sales: Wafer Form, Tape and Reel, and Bumped Wafers Description The AT25080A/160A/320A/640A provides 8192/16384/32768/65536 bits of serial electrically-erasable programmable read-only memory (EEPROM) organized as 1024/2048/4096/8192 words of 8 bits each. The device is optimized for use in many industrial and commercial applications where low-power and low-voltage operation are essential ...

Page 2

Table 0-1. Pin Configuration Pin Name Function CS Chip Select SCK Serial Data Clock SI Serial Data Input SO Serial Data Output GND Ground VCC Power Supply WP Write Protect HOLD Suspends Serial Input NC No Connect DC Don’t Connect ...

Page 3

Figure 1-1. (1) Table 1-1. Pin Capacitance Applicable over recommended operating range from T Symbol Test Conditions C Output Capacitance (SO) OUT C Input Capacitance (CS, SCK, SI, WP, HOLD) IN Note: 1. This parameter is characterized and is not ...

Page 4

Table 1-2. DC Characteristics Applicable over recommended operating range from: T Symbol Parameter V Supply Voltage CC1 V Supply Voltage CC2 V Supply Voltage CC3 I Supply Current CC1 I Supply Current CC2 I Supply Current CC3 I Standby Current ...

Page 5

Table 1-3. AC Characteristics Applicable over recommended operating range from TTL Gate and 30 pF (unless otherwise noted) Symbol Parameter f SCK Clock Frequency SCK t Input Rise Time RI t Input Fall Time FI t ...

Page 6

Table 1-3. AC Characteristics (Continued) Applicable over recommended operating range from TTL Gate and 30 pF (unless otherwise noted) Symbol Parameter t HOLD to Output Low HOLD to Output High ...

Page 7

Serial Interface Description MASTER: The device that generates the serial clock. SLAVE: Because the Serial Clock pin (SCK) is always an input, the AT25080A/160A/320A/640A always operates as a slave. TRANSMITTER/RECEIVER: The AT25080A/160A/320A/640A has separate pins designated for data transmission ...

Page 8

Figure 2-1. AT25080A/160A/320A/640A 8 SPI Serial Interface AT25080A/160A/320A/640A 3347L–SEEPR–06/07 ...

Page 9

... X010 Status Register Format Bit 6 Bit 5 Bit Operation Set Write Enable Latch Reset Write Enable Latch Read Status Register Write Status Register Read Data from Memory Array Write Data to Memory Array Bit 3 Bit 2 Bit 1 BP1 BP0 WEN is CC Bit 0 RDY 9 ...

Page 10

... WRITE STATUS REGISTER (WRSR): The WRSR instruction allows the user to select one of four levels of protection. The AT25080A/160A/320A/640A is divided into four array segments. One-quarter, one-half, or all of the memory segments can be protected. Any of the data within any selected segment will therefore be read only. The block write protection levels and corre- ...

Page 11

... WRITE SEQUENCE (WRITE): In order to program the AT25080A/160A/320A/640A, two sepa- rate instructions must be executed. First, the device must be write enabled via the WREN instruction. Then a write (WRITE) instruction may be executed. Also, the address of the memory location( programmed must be outside the protected address field location selected by the block write protection level ...

Page 12

Table 3-6. Address Don’t Care Bits 4. Timing Diagrams Figure 4-1. Synchronous Data Timing (for Mode CSS V IH SCK HI-Z SO ...

Page 13

Figure 4-3. WRDI Timing Figure 4-4. RDSR Timing SCK INSTRUCTION SI HIGH IMPEDANCE SO Figure 4-5. WRSR Timing SCK INSTRUCTION SI HIGH IMPEDANCE SO 3347L–SEEPR–06/ MSB ...

Page 14

Figure 4-6. READ Timing SCK SI INSTRUCTION HIGH IMPEDANCE SO Figure 4-7. WRITE Timing SCK INSTRUCTION SI HIGH IMPEDANCE SO Figure 4-8. HOLD Timing CS SCK HOLD SO AT25080A/160A/320A/640A ...

Page 15

AT25080A Ordering Information Ordering Code (2) AT25080A-10PU-2.7 (2) AT25080A-10PU-1.8 (2) AT25080AN-10SU-2.7 (2) AT25080AN-10SU-1.8 (2) AT25080A-10TU-2.7 (2) AT25080A-10TU-1.8 (2) (Not recommended for new design) AT25080AY1-10YU-1.8 (3) AT25080AY6-10YH-1.8 (4) AT25080A-W1.8-11 Notes: 1. For 2.7V devices used in the 4.5 to 5.5V ...

Page 16

AT25160A Ordering Information Ordering Code (2) AT25160A-10PU-2.7 (2) AT25160A-10PU-1.8 (2) AT25160AN-10SU-2.7 (2) AT25160AN-10SU-1.8 (2) AT25160A-10TU-2.7 (2) AT25160A-10TU-1.8 (2) (Not recommended for new design) AT25160AY1-10YU-1.8 (3) AT25160AY6-10YH-1.8 AT25160AD3-10DH-1.8 (4) AT25160A-W1.8-11 Notes: 1. For 2.7V devices used in the 4.5 to ...

Page 17

AT25320A Ordering Information Ordering Code (2) AT25320A-10PU-2.7 (2) AT25320A-10PU-1.8 (2) AT25320AN-10SU-2.7 (2) AT25320AN-10SU-1.8 (2) AT25320A-10TU-2.7 (2) AT25320A-10TU-1.8 (2) (Not recommended for new design) AT25320AY1-10YU-1.8 (3) AT25320AY6-10YH-1.8 (4) AT25320A-W1.8-11 Notes: 1. For 2.7V devices used in the 4.5 to 5.5V ...

Page 18

... AT25640A Ordering Information Ordering Code (2) AT25640A-10PU-2.7 (2) AT25640A-10PU-1.8 (2) AT25640AN-10SU-2.7 (2) AT25640AN-10SU-1.8 (2) AT25640A-10TU-2.7 (2) AT25640A-10TU-1.8 (2)(Not recommended for new design) AT25640AY1-10YU-1.8 (3) AT25640AY6-10YH-1.8 (3) AT25640A-W1.8-11 Notes: 1. For 2.7V devices used in the 4.5 to 5.5V range, please refer to performance values in the AC and DC Characteristics tables. 2. “U” designates Green package + RoHS compliant. ...

Page 19

Packaging Information 8P3 – PDIP Top View PLCS Side View Notes: 1. This drawing is for general information only; refer to JEDEC Drawing MS-001, Variation BA, for additional information. 2. Dimensions A and L are ...

Page 20

JEDEC SOIC Top View e Side View Note: These drawings are for general information only. Refer to JEDEC Drawing MS-012, Variation AA for proper dimensions, tolerances, datums, etc. 1150 E. Cheyenne Mtn. Blvd. Colorado Springs, CO 80906 R ...

Page 21

TSSOP Pin 1 indicator this corner N Top View Side View Notes: 1. This drawing is for general information only. Refer to JEDEC Drawing MO-153, Variation AA, for proper dimensions, tolerances, datums, ...

Page 22

MAP D E Top View Side View 2325 Orchard Parkway San Jose, CA 95131 R AT25080A/160A/320A/640A End View A SYMBOL TITLE 8Y1, 8-lead (4.90 x 3.00 ...

Page 23

Mini MAP D Notes: 1. This drawing is for general information only. Refer to JEDEC Drawing MO-229, for proper dimensions, tolerances, datums, etc. 2. Dimension b applies to metallized terminal and is measured between 0.15 mm and 0.30 ...

Page 24

ULLGA PIN # TOP VIEW 1150 E. Cheyenne Mtn. Blvd. Colorado Springs, CO 80906 R AT25080A/160A/320A/640A SIDE VIEW SYMBOL ...

Page 25

Revision History Doc. Rev. 3347M 3347L 3347K 3347L–SEEPR–06/07 AT25080A/160A/320A/640A Date Comments Added 8D3-ULLGA to document 6/2007 Changed Feature descriptions on page 1 Added AT25640AY6-10YU-1.8 ordering code. 4/2007 Added ‘Not recommended for new design’ note to AT25640AY1- 10YU-1.8 ordering code. ...

Page 26

... Disclaimer: The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of Atmel products. EXCEPT AS SET FORTH IN ATMEL’S TERMS AND CONDI- TIONS OF SALE LOCATED ON ATMEL’S WEB SITE, ATMEL ASSUMES NO LIABILITY WHATSOEVER AND DISCLAIMS ANY EXPRESS, IMPLIED OR STATUTORY WARRANTY RELATING TO ITS PRODUCTS INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT ...

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