AT24C02BN-SH-T Atmel, AT24C02BN-SH-T Datasheet

IC EEPROM 2KBIT 1MHZ 8SOIC

AT24C02BN-SH-T

Manufacturer Part Number
AT24C02BN-SH-T
Description
IC EEPROM 2KBIT 1MHZ 8SOIC
Manufacturer
Atmel
Datasheet

Specifications of AT24C02BN-SH-T

Format - Memory
EEPROMs - Serial
Memory Type
EEPROM
Memory Size
2K (256 x 8)
Speed
400kHz, 1MHz
Interface
I²C, 2-Wire Serial
Voltage - Supply
1.8 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
AT24C02BN-10SU-1.8 SL383
AT24C02BN-10SU-1.8 SL383

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT24C02BN-SH-T
Manufacturer:
ATMEL
Quantity:
10 000
Part Number:
AT24C02BN-SH-T
Manufacturer:
ATMEL
Quantity:
4 400
Part Number:
AT24C02BN-SH-T
Manufacturer:
ALMEL
Quantity:
2
Part Number:
AT24C02BN-SH-T
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Features
Description
The AT24C02B provides 2048 bits of serial electrically erasable and programmable
read-only memory (EEPROM) organized as 256 words of 8 bits each. The device is
optimized for use in many industrial and commercial applications where low-power
and low-voltage operation are essential. The AT24C02B is available in space-saving
8-lead PDIP, 8-lead JEDEC SOIC, 8-lead Ultra Thin Mini-MAP (MLP 2x3)
SOT23, 8-lead TSSOP, and 8-ball dBGA2 packages and is accessed via a Two-wire
serial interface. In addition, the AT24C02B is available in 1.8V (1.8V to 5.5V) version.
Table 0-1.
Note:
Pin Name
A0 - A2
SDA
SCL
WP
GND
VCC
Low-voltage and Standard-voltage Operation
Internally Organized 256 x 8 (2K)
Two-wire Serial Interface
Schmitt Trigger, Filtered Inputs for Noise Suppression
Bidirectional Data Transfer Protocol
1 MHz (5V), 400 kHz (1.8V, 2.5V, 2.7V) Compatibility
Write Protect Pin for Hardware Data Protection
8-byte Page (2K) Write Modes
Partial Page Writes Allowed
Self-timed Write Cycle (5 ms max)
High-reliability
8-lead PDIP, 8-lead JEDEC SOIC, 8-lead Ultra Thin Mini-MAP (MLP 2x3), 5-lead SOT23,
8-lead TSSOP and 8-ball dBGA2 Packages
Lead-free/Halogen-free
Available in Automotive
Die Sales: Wafer Form and Tape and Reel
– 1.8 (V
– Endurance: 1 Million Write Cycles
– Data Retention: 100 Years
For use of 5-lead SOT23, the
software A2, A1, and A0 bits in
the device address word
must be set to zero to prop-
erly communicate.
CC
Function
Address Inputs
Serial Clock Input
Write Protect
Ground
Power Supply
Serial Data
= 1.8V to 5.5V)
Pin Configuration
GND
SDA
SCL
Mini-MAP (MLP 2x3)
GND
8-lead Ultra-Thin
VCC
SDA
A0
A1
A2
SCL
WP
8-lead TSSOP
5-lead SOT23
Bottom View
1
2
3
8
7
6
5
1
2
3
4
1
2
3
4
8
7
6
5
5
4
A0
A1
A2
GND
VCC
WP
SCL
SDA
WP
VCC
GND
GND
A0
A1
A2
VCC
SDA
SCL
A0
A1
A2
WP
8-ball dBGA2
Bottom View
8-lead SOIC
8-lead PDIP
1
2
3
4
1
2
3
4
8
7
6
5
1
2
3
4
8
7
6
5
8
7
6
5
,
5-lead
A0
A1
A2
GND
VCC
WP
SCL
SDA
VCC
WP
SCL
SDA
Two-wire
Serial EEPROM
2K (256 x 8)
AT24C02B
Not
Recommended
for New Design
5126H–SEEPR–8/07

Related parts for AT24C02BN-SH-T

AT24C02BN-SH-T Summary of contents

Page 1

... Description The AT24C02B provides 2048 bits of serial electrically erasable and programmable read-only memory (EEPROM) organized as 256 words of 8 bits each. The device is optimized for use in many industrial and commercial applications where low-power and low-voltage operation are essential. The AT24C02B is available in space-saving ...

Page 2

Absolute Maximum Ratings Operating Temperature ................................ –55C to +125C Storage Temperature.................................... –65C to +150C Voltage on Any Pin with Respect to Ground ....................................–1.0V to +7.0V Maximum Operating Voltage .......................................... 6.25V DC Output Current........................................................ 5.0 mA Figure 0-1. Block Diagram VCC ...

Page 3

... Table 1-1. WP Pin Status GND 2. Memory Organization AT24C02B, 2K SERIAL EEPROM: Internally organized with 32 pages of 8 bytes each, the 2K requires an 8-bit data word address for random word addressing. 5126H–SEEPR–8/07 Table 1-1. Write Protect Part of the Array Protected ...

Page 4

Table 2-1. Pin Capacitance Applicable over recommended operating range from T Symbol Test Condition C Input/Output Capacitance (SDA) I/O C Input Capacitance ( Note: 1. This parameter is characterized and is not 100% tested. Table ...

Page 5

Table 2-3. AC Characteristics Applicable over recommended operating range from T 100 pF (unless otherwise noted) Symbol Parameter t Time the bus must be free before a new transmission can start BUF t Start Hold Time HD.STA t Start Setup ...

Page 6

Device Operation CLOCK and DATA TRANSITIONS: The SDA pin is normally pulled high with an external device. Data on the SDA pin may change only during SCL low time periods (see Data changes during SCL high periods will indicate ...

Page 7

Bus Timing Figure 4-1. SCL: Serial Clock, SDA: Serial Data I/O SCL t SU.STA SDA IN SDA OUT 5. Write Cycle Timing Figure 5-1. SCL: Serial Clock, SDA: Serial Data I/O SCL SDA 8th BIT WORDn Note: 1. The ...

Page 8

Figure 5-2. Data Validity SDA SCL Figure 5-3. Start and Stop Definition SDA SCL Figure 5-4. Output Acknowledge SCL DATA IN DATA OUT AT24C02B 8 DATA STABLE DATA STABLE DATA CHANGE START 1 START STOP 8 9 ACKNOWLEDGE 5126H–SEEPR–8/07 ...

Page 9

... The data word address lower three bits are internally incremented following the receipt of each data word. The higher data word address bits are not incremented, retaining the memory page row location. When the word address, internally generated, reaches the page boundary, the fol- lowing byte is placed at the beginning of the same page. If more than eight data words are transmitted to the EEPROM, the data word address will “ ...

Page 10

... The address “roll over” during read is from the last byte of the last memory page to the first byte of the first page. The address “roll over” during write is from the last byte of the current page to the first byte of the same page ...

Page 11

Figure 8-2. Byte Write Figure 8-3. Page Write Figure 8-4. Current Address Read 5126H–SEEPR–8/07 AT24C02B 11 ...

Page 12

Figure 8-5. Random Read Figure 8-6. Sequential Read AT24C02B 12 5126H–SEEPR–8/07 ...

Page 13

... AT24C02B Ordering Information Ordering Code AT24C02B-PU (Bulk form only) (1) AT24C02BN-SH-B (NiPdAu Lead Finish) (2) AT24C02BN-SH-T (NiPdAu Lead Finish) (1) AT24C02B-TH-B (NiPdAu Lead Finish) (2) AT24C02B-TH-T (NiPdAu Lead Finish) (2) AT24C02BY6-YH-T (NiPdAu Lead Finish) (2) AT24C02B-TSU-T (2) AT24C02BU3-UU-T (3) AT24C02B-W-11 Notes: 1. “-B” denotes bulk. 2. “-T” denotes tape and reel. SOIC = 4K per reel. TSSOP, Ultra Thin Mini-MAP, SOT23, and dBGA2 = 5K per reel. ...

Page 14

Part Marking Scheme 8-PDIP TOP MARK |---|---|---|---|---|---|---|---| A |---|---|---|---|---|---|---|---| 0 |---|---|---|---|---|---|---|---| * |---|---|---|---|---|---|---|---| | Pin 1 Indicator (Dot Material Set Y = Seal Year WW = Seal Week 02B = Device 1 = Voltage Indicator *Lot Number ...

Page 15

TOP MARK |---|---|---|---|---|---|---|---| A |---|---|---|---|---|---|---|---| 0 |---|---|---|---|---|---|---|---| * |---|---|---|---|---|---|---|---| | Pin 1 Indicator (Dot Material Set Y = Seal Year WW = Seal Week 02B = Device 1 = Voltage Indicator *Lot Number to Use ALL Characters ...

Page 16

TOP MARK Pin 1 Indicator (Dot) | |---|---|---|---| * |---|---|---|---|---| |---|---|---|---|---| H = Material Set Y = Seal Year WW = Seal Week 02B = Device V = Voltage Indicator BOTTOM ...

Page 17

SOT23 TOP MARK Line 1 -----------> Device 1 = Voltage Indicator W = Write Protect Feature U = Material Set BOTTOM MARK |---|---|---|---| Y |---|---|---|---| Y = One Digit Year Code M = Seal Month TC = Trace ...

Page 18

TOP MARK LINE 1-------> LINE 2-------> 02B = Device U = Material Set Y = One Digit Year Code M = Seal Month TC = Trace Code AT24C02B 18 02BU YMTC |<-- Pin 1 This Corner 5126H–SEEPR–8/07 ...

Page 19

Packaging Information 8P3 – PDIP Top View PLCS Side View Notes: 1. This drawing is for general information only; refer to JEDEC Drawing MS-001, Variation BA, for additional information. 2. Dimensions A and L are ...

Page 20

JEDEC SOIC Top View e Side View Note: These drawings are for general information only. Refer to JEDEC Drawing MS-012, Variation AA for proper dimensions, tolerances, datums, etc. 1150 E. Cheyenne Mtn. Blvd. Colorado Springs, CO 80906 R ...

Page 21

TSSOP Pin 1 indicator this corner N Top View Side View Notes: 1. This drawing is for general information only. Refer to JEDEC Drawing MO-153, Variation AA, for proper dimensions, tolerances, datums, ...

Page 22

Mini Map D Notes: 1. This drawing is for general information only. Refer to JEDEC Drawing MO-229, for proper dimensions, tolerances, datums, etc. 2. Dimension b applies to metallized terminal and is measured between 0.15 mm and 0.30 ...

Page 23

SOT23 E1 1 Seating Plane NOTES: 1. This drawing is for general information only. Refer to JEDEC Drawing MO-193, Variation AB, for additional information. 2. Dimension D does not include mold flash, protrusions, or gate burrs. Mold flash, ...

Page 24

PIN 1 BALL PAD CORNER Top View PIN 1 BALL PAD CORNER 1 2 (d1 (e1) Bottom View 8 SOLDER BALLS 1. Dimension “b” is measured at the maximum solder ball diameter. This ...

Page 25

... Removed reference to Waffle Pack on page 1 and Page 13 Added lines to Ordering Code table Removed NC row in the table Added note 4/2007 Corrected format on table 5 Removed Memory Reset section Added 2-Wire software reset section and figure Corrected Figures 7-11 Corrected dBGA2 package code 2/2007 Removed ‘Preliminary’ ...

Page 26

... Disclaimer: The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of Atmel products. EXCEPT AS SET FORTH IN ATMEL’S TERMS AND CONDI- TIONS OF SALE LOCATED ON ATMEL’S WEB SITE, ATMEL ASSUMES NO LIABILITY WHATSOEVER AND DISCLAIMS ANY EXPRESS, IMPLIED OR STATUTORY WARRANTY RELATING TO ITS PRODUCTS INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT ...

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