M34D64-WMN6T STMicroelectronics, M34D64-WMN6T Datasheet - Page 18
![IC EEPROM 64KBIT 400KHZ 8SOIC](/photos/1/38/13851/497-8-soic_sml.jpg)
M34D64-WMN6T
Manufacturer Part Number
M34D64-WMN6T
Description
IC EEPROM 64KBIT 400KHZ 8SOIC
Manufacturer
STMicroelectronics
Datasheet
1.M34D64-WMN6TP.pdf
(27 pages)
Specifications of M34D64-WMN6T
Format - Memory
EEPROMs - Serial
Memory Type
EEPROM
Memory Size
64K (8K x 8)
Speed
400kHz
Interface
I²C, 2-Wire Serial
Voltage - Supply
2.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
497-1724-2
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
M34D64-WMN6TP
Manufacturer:
ST
Quantity:
20 000
Device operation
3.12
3.13
3.14
18/27
Current Address Read
The device has an internal address counter which is incremented each time a byte is read.
For the Current Address Read operation, following a Start condition, the bus master only
sends a Device Select Code with the Read/Write bit (RW) set to 1. The device
acknowledges this, and outputs the byte addressed by the internal address counter. The
counter is then incremented. The bus master terminates the transfer with a Stop condition,
as shown in
Sequential Read
This operation can be used after a Current Address Read or a Random Address Read. The
bus master does acknowledge the data byte output, and sends additional clock pulses so
that the device continues to output the next byte in sequence. To terminate the stream of
bytes, the bus master must not acknowledge the last byte, and must generate a Stop
condition, as shown in
The output data comes from consecutive addresses, with the internal address counter
automatically incremented after each byte output. After the last memory address, the
address counter ‘rolls-over’, and the device continues to output data from memory address
00h.
Acknowledge in Read mode
For all Read commands, the device waits, after each byte read, for an acknowledgment
during the 9
time, the device terminates the data transfer and switches to its Standby mode.
th
Figure 9.: Read mode
bit time. If the bus master does not drive Serial Data (SDA) low during this
Figure 9.: Read mode
sequences, without acknowledging the byte.
sequences.
M34D64-W