M58BW016FB7T3T NUMONYX, M58BW016FB7T3T Datasheet - Page 20

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M58BW016FB7T3T

Manufacturer Part Number
M58BW016FB7T3T
Description
IC FLASH 16MBIT 70NS 80PQFP
Manufacturer
NUMONYX
Datasheet

Specifications of M58BW016FB7T3T

Format - Memory
FLASH
Memory Type
FLASH
Memory Size
16M (512K x 32)
Speed
70ns
Interface
Parallel
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 125°C
Package / Case
80-MQFP, 80-PQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
M58BW016FB7T3TCT
Bus operations
3.1.7
3.1.8
3.1.9
3.1.10
20/70
Standby mode
When Chip Enable is High, V
Standby mode, the power consumption is reduced to the standby level and the Data
inputs/outputs pins are placed in the high impedance state regardless of Output Enable,
Write Enable or Output Disable inputs.
Automatic low power mode
If there is no change in the state of the bus for a short period of time during asynchronous
bus read operations the memory enters auto low power mode where the internal supply
current is reduced to the auto-standby supply current. The data inputs/outputs will still
output data if a bus read operation is in progress.
Automatic low power is only available in asynchronous read modes.
Power-down mode
The memory is in power-down when Reset/Power-down, RP, is at V
consumption is reduced to the power-down level and the outputs are high impedance,
independent of the Chip Enable, E, Output Enable, G, Output Disable, GD, or Write Enable,
W, inputs.
Electronic signature
Two codes identifying the manufacturer and the device can be read from the memory
allowing programming equipment or applications to automatically match their interface to
the characteristics of the memory. The electronic signature is output by giving the Read
Electronic Signature command. The manufacturer code is output when all the address
inputs are at V
are at V
Memory Array command to return to read mode.
Table 4.
1. X = don’t care.
Asynchronous bus read
Asynchronous latch
controlled bus read
Asynchronous page read
Asynchronous bus write
Asynchronous latch
controlled bus write
Output Enable, G
Output Disable, GD
Standby
Reset/power-down
Bus operation
IL
(see
Asynchronous bus operations
IL
Table 5: Asynchronous read electronic signature
. The device code is output when A1 is at V
Address Latch V
Read
Address Latch V
Write
M58BW016DT, M58BW016DB, M58BW016FT, M58BW016FB
IH
Step
, and the Program/Erase controller is idle, the memory enters
V
V
V
V
V
V
V
V
X
E
IH
IL
IL
IL
IL
IL
IL
IL
IL
IL
V
V
V
V
V
V
V
V
V
G
X
X
(1)
IH
IH
IH
IH
IL
IL
IL
IL
IL
GD
V
V
V
V
V
V
V
X
X
X
X
IH
IH
IH
IH
IH
IH
IL
V
V
V
V
V
V
V
V
V
W
X
X
IH
IH
IH
IH
IH
IH
IL
IL
IL
IH
V
V
V
V
V
V
V
V
V
V
RP
V
and all the other address pins
IH
IH
IH
IH
IH
IH
IH
IH
IH
IH
IL
operation). Issue a Read
V
V
V
V
V
V
X
X
X
X
X
L
IH
IH
IL
IL
IL
IL
IL
. The power
Address Data output
Address
Address Data output
Address
Address
A0-A18
X
X
X
X
X
X
Data output
DQ0-DQ31
Data input
Data input
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z

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