TE28F640J3C115SL7HA Intel, TE28F640J3C115SL7HA Datasheet - Page 45

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TE28F640J3C115SL7HA

Manufacturer Part Number
TE28F640J3C115SL7HA
Description
IC FLASH 64MBIT 115NS 56TSOP
Manufacturer
Intel
Datasheet

Specifications of TE28F640J3C115SL7HA

Format - Memory
FLASH
Memory Type
StrataFlash® FLASH
Memory Size
64M (8Mx8, 4Mx16)
Speed
115ns
Interface
Parallel
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
56-TSOP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
860794
256-Mbit J3 (x8/x16)
The only other valid commands while block erase is suspended are Read Query, Read Status
Register, Clear Status Register, Configure, and Block Erase Resume. After a Block Erase Resume
command is written to the flash memory, the WSM will continue the block erase process. SR.6 and
SR.7 will automatically clear and STS (in default mode) will return to V
. After the Erase
OL
Resume command is written, the device automatically outputs SRD when read (see
Figure 23,
“Block Erase Suspend/Resume Flowchart” on page
64). V
must remain at V
(the same
PEN
PENH
V
level used for block erase) while block erase is suspended. Block erase cannot resume until
PEN
program operations initiated during block erase suspend have completed.
12.3
Erase Resume
To resume (i.e., continue) an erase suspend operation, execute the Erase Resume command. The
Resume command can be written to any device address. When a program operation is nested
within an erase suspend operation and the Program Suspend command is issued, the device will
suspend the program operation. When the Resume command is issued, the device will resume the
program operations first. Once the nested program operation is completed, an additional Resume
command is required to complete the block erase operation. The device supports a maximum
suspend/resume of two nested routines. See
Figure 22, “Block Erase Flowchart” on page
63.
Datasheet
45

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