MD8331-D2G-V3-X-P SanDisk, MD8331-D2G-V3-X-P Datasheet - Page 36

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MD8331-D2G-V3-X-P

Manufacturer Part Number
MD8331-D2G-V3-X-P
Description
IC MDOC G4 2GB 69-FBGA
Manufacturer
SanDisk
Datasheet

Specifications of MD8331-D2G-V3-X-P

Format - Memory
FLASH
Memory Type
FLASH - Nand
Memory Size
2G (256M x 8)
Speed
33ns
Interface
Parallel
Voltage - Supply
2.5 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
69-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
585-1149-2
MD8831-D2G-V3-X-P
MD8832-D2G-V3-X-P

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6.4.8 Error Detection/Correction
TrueFFS implements a unique MLC-tailored Error Correction Code (ECC) algorithm to ensure data
reliability. Refer to Section 3.7 for further information on the EDC/ECC mechanism.
6.4.9
In addition to standard storage device functionality, the TrueFFS driver provides extended
functionality. This functionality goes beyond simple data storage capabilities to include features
such as: formatting the media, read/write protection, boot partition(s) access, flash defragmentation
and other options. This unique functionality is available in all TrueFFS-based drivers through the
standard I/O control command of the native file system.
6.4.10 Compatibility
DiskOnChip G4 requires TrueFFS driver 6.3 or higher. Migrating from other than DiskOnChip G4
to DiskOnChip G4 requires changing the TrueFFS driver. TrueFFS 6.3.supports all DiskOnChip
product lines including DiskOnChip G4/P4, DiskOnChip G3/P3, DiskOnChip H1 and DiskOnChip-
based MCP.
When using different drivers (e.g. TrueFFS SDK, BDK, etc.) to access DiskOnChip G4, verify that
all software is based on the same code base version. It is also important to use only tools (e.g.
DFORMAT, DINFO, DIMAGE, etc.) from the same version as the TrueFFS drivers used in the
application. Failure to do so may lead to unexpected results, such as lost or corrupted data. The
driver version can be verified by the sign-on messages displayed, or by the version information
presented by the driver or tool.
6.5
TrueFFS utilizes an 8KB memory window in the CPU address space, consisting of four 2KB
sections as depicted in Figure 11. When in Reset mode, read cycles from sections 1 and 2 always
return the value 00H to create a fixed and known checksum. When in Normal mode, these two
sections are used for the internal registers. The 2KB Programmable Boot Block is in section 0 and
section 3, to support systems that search for a checksum at the boot stage both from the top and
bottom of memory. The addresses described here are relative to the absolute starting address of the
8KB memory window.
36
Special Features through I/O Control (IOCTL) Mechanism
8KB Memory Window
Data Sheet (Preliminary) Rev. 0.3
DiskOnChip G4 128MB (1Gb)/256MB (2Gb) 1.8V
92-DS-1105-00

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