MD5811-D256-V3Q18-P SanDisk, MD5811-D256-V3Q18-P Datasheet - Page 44

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MD5811-D256-V3Q18-P

Manufacturer Part Number
MD5811-D256-V3Q18-P
Description
IC MDOC P3 256MB 48-TSOP
Manufacturer
SanDisk
Datasheet

Specifications of MD5811-D256-V3Q18-P

Format - Memory
FLASH
Memory Type
FLASH - Nand
Memory Size
256M (32M x 8)
Speed
55ns
Interface
Parallel
Voltage - Supply
2.5 V ~ 3.6 V
Operating Temperature
0°C ~ 70°C
Package / Case
48-TSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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7.1.8
In addition to standard storage device functionality, the TrueFFS driver provides extended
functionality. This functionality goes beyond simple data storage capabilities to include features
such as: formatting the media, read/write protection, boot partition(s) access, flash defragmentation
and other options. This unique functionality is available in all TrueFFS-based drivers through the
standard I/O control command of the native file system.
7.1.9
Mobile DiskOnChip P3 requires TrueFFS driver 6.x or higher.
When using different drivers (e.g. TrueFFS SDK, BDK, BIOS extension firmware, etc.) to access
Mobile DiskOnChip P3, verify that all software is based on the same code base version. It is also
important to use only tools (e.g. DFORMAT, DINFO, GETIMAGE, etc.) from the same version as
the firmware and the TrueFFS drivers used in the application. Failure to do so may lead to
unexpected results, such as lost or corrupted data. The driver and firmware version can be verified
by the sign-on messages displayed, or by the version information stored in the driver or tool.
7.2
TrueFFS utilizes an 8KB memory window in the CPU address space, consisting of four 2KB
sections as depicted in Figure 15. When in Reset mode, read cycles from sections 1 and 2 always
return the value 00H to create a fixed and known checksum. When in Normal mode, these two
sections are used for the internal registers. The 2KB Programmable Boot Block is in section 0 and
section 3, to support systems that search for a checksum at the boot stage both from the top and
bottom of memory. The addresses described here are relative to the absolute starting address of the
8KB memory window.
41
Special Features Through I/O Control (IOCTL) Mechanism
Compatibility
8KB Memory Window
Figure 15: Mobile DiskOnChip P3 Memory Map
1000H
1800H
000H
800H
Programmable
Programmable
Reset Mode
Boot Block
Boot Block
00H
00H
Data Sheet, Rev. 0.3
Section 0
Section 1
Section 2
Section 3
Programmable
Normal Mode
Programmable
Boot Block
Boot Block
Flash area
(+ aliases)
Registers
window
Control
Mobile DiskOnChip P3
93-SR-009-8L

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