DS1321S/T&R Maxim Integrated Products, DS1321S/T&R Datasheet

IC CTRLR NV W/BATT MON 5V 16SOIC

DS1321S/T&R

Manufacturer Part Number
DS1321S/T&R
Description
IC CTRLR NV W/BATT MON 5V 16SOIC
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of DS1321S/T&R

Controller Type
Nonvolatile RAM
Voltage - Supply
4.75 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
16-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
FEATURES
§ Converts CMOS SRAM into nonvolatile
§ Unconditionally write-protects SRAM when
§ Automatically switches to battery backup
§ Flexible memory organization
§ Monitors voltage of a lithium cell and
§ Signals low-battery condition on active low
§ Resets processor when power failure occurs
§ Optional 5% or 10% power-fail detection
§ 16-pin DIP, 16-pin SOIC and 20-pin TSSOP
§ Industrial temperature range of -40°C to
PIN DESCRIPTION
V
V
V
A, B
TOL
MODE
GND
NC
www.dalsemi.com
CEI1
CEO1
BW
RST
CCI
CCO
BAT
memory
V
supply when V
provides advanced warning of impending
battery failure
Battery Warning output signal
and holds processor in reset during system
power-up
packages
+85°C
CC
- Mode 0: 4 banks with 1 SRAM each
- Mode 1: 2 banks with 2 SRAMs each
- Mode 2: 1 bank with 4 SRAMs each
-
-
CEI4
CEO4
is out of tolerance
- +5V Power Supply Input
- SRAM Power Supply Output
- Backup Battery Input
- Address Inputs
- Chip Enable Inputs
- Chip Enable Outputs
- V
- Battery Warning Output (Open
- Reset Output (Open Drain)
- Mode Input
- Ground
- No Connection
Drain)
CC
CC
Tolerance Select
power failure occurs
1 of 12
PIN ASSIGNMENT
Flexible Nonvolatile Controller with
B/CEI4
B/CEI4
A/CEI3
A/CEI3
B/CEI4
A/CEI3
CEI2
CEI2
GND
V
V
GND
V
CEI1
CEI1
TOL
V
TOL
CEI1
CEI2
GND
V
TOL
V
CCO
CCO
BAT
BAT
NC
CCO
NC
DS1321E 20-Pin TSSOP
BAT
DS1321S 16-Pin SOIC
DS1321 16-Pin DIP
Lithium Battery Monitor
1
2
3
4
5
6
7
8
9
10
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
(300-mil)
(150-mil)
16
15
14
13
12
10
16
15
14
13
12
10
11
11
13
20
19
18
17
16
15
14
12
9
11
9
V
RST
BW
CEO1
CEO2
CEO3
CEO4
MODE
V
RST
BW
CEO1
CEO2
NC
CEO3
CEO4
NC
MODE
V
RST
BW
CEO1
CEO2
CEO3
CEO4
MODE
CCI
CCI
CCI
DS1321
091404

Related parts for DS1321S/T&R

DS1321S/T&R Summary of contents

Page 1

FEATURES § Converts CMOS SRAM into nonvolatile memory § Unconditionally write-protects SRAM when V is out of tolerance CC § Automatically switches to battery backup supply when V power failure occurs CC § Flexible memory organization - Mode 0: ...

Page 2

DESCRIPTION The DS1321 Flexible Nonvolatile Controller with Lithium Battery Monitor is a CMOS circuit which solves the application problem of converting CMOS SRAMs into nonvolatile memory. Incoming power is monitored for an out-of-tolerance condition. When such a condition is detected, ...

Page 3

MEMORY CONFIGURATIONS The DS1321 can be configured via the MODE pin for three different arrangements of the four attached SRAMs. The state of the MODE pin is latched at V MEMORY CONFIGURATIONS Figure 1 MODE = GND (4 BANKS WITH ...

Page 4

BATTERY VOLTAGE MONITORING The DS1321 automatically performs periodic battery voltage monitoring at a factory-programmed time interval of 24 hours. Such monitoring begins within t when power failure occurs. After each 24-hour period (t resistor (R ) for one second (t ...

Page 5

FRESHNESS SEAL MODE When the battery is first attached to the DS1321 without V immediately provide battery-backup power on V leave Freshness Seal Mode. This mode allows a battery to be attached during manufacturing but not used until after the ...

Page 6

ABSOLUTE MAXIMUM RATINGS* Voltage on Any Pin Relative to Ground Operating Temperature Storage Temperature Soldering Temperature * This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the ...

Page 7

CAPACITANCE PARAMETER Input Capacitance ( *, TOL, MODE) CEI Output Capacitance ( *, , ) CEO BW RST AC ELECTRICAL CHARACTERISTICS PARAMETER to Propagation Delay CEI CEO Pulse Width CE V Valid to End of CC Write Protection V Valid ...

Page 8

TIMING DIAGRAM: POWER-UP NOTE > will begin to slew with V BAT CCTP CCO when CCI CCI CCTP ...

Page 9

TIMING DIAGRAM: POWER-DOWN NOTES > will slew down with V BAT CCTP CCO until CCI CCI CCTP ...

Page 10

TIMING DIAGRAM: BATTERY WARNING DETECTION NOTE measured from the expiration of the internal timer to the activation of the battery warning output TIMING DIAGRAM: BATTERY REPLACEMENT ...

Page 11

NOTES: 1. All voltages referenced to ground. 2. Measured with outputs open circuited the maximum average load which the DS1321 can supply to attached memories at V CCO1 V -0.2V. CCI the maximum average ...

Page 12

DATA SHEET REVISION SUMMARY The following represent the key differences between 03/26/96 and 06/12/97 version of the DS1321 data sheet. Please review this summary carefully. 1. Changed I from 200 to 185 mA max CCO1 2. Changed I from 350 ...

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