ICE3A1065L Infineon Technologies, ICE3A1065L Datasheet - Page 9

• Manufacturer Part Number: ICE3A1065L
• Description: IC OFFLINE CTRLR SMPS CM 8DIP
• Manufacturer: Infineon Technologies
• Series: CoolSET®F3r

Specifications of ICE3A1065L

• Output Isolation: Isolated
• Frequency Range: 92 ~ 108kHz
• Voltage - Input: 8.5 ~ 22 V
• Voltage - Output: 650V
• Power (watts): 32W
• Operating Temperature: -25°C ~ 130°C
• Package / Case: 8-DIP (0.300", 7.62mm)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: ICE3A1065LX; ICE3A1065LXK; SP000098668

3.4
Figure 6
3.4.1
The oscillator generates a fixed frequency. The
switching frequency for ICE3Axx65L is f
and ICE3Bxx65L is f
capacitor and a current source and current sink which
determine the frequency are integrated. The charging
and discharging current of the implemented oscillator
capacitor are internally trimmed, in order to achieve a
very accurate switching frequency. The ratio of
controlled charge to discharge current is adjusted to
reach a maximum duty cycle limitation of D
3.4.2
The oscillator clock output provides a set pulse to the
PWM-Latch when initiating the internal CoolMOS™
conduction. After setting the PWM-Latch can be reset
by the PWM comparator, the Soft Start comparator or
the Current-Limit comparator. In case of resetting, the
driver is shut down immediately.
Version 2.0
Comparator
Comparator
Soft Start
Current
Limiting
PWM
Duty Cycle
Oscillator
Clock
max
PWM Section
Oscillator
PWM-Latch FF1
PWM Section Block
0.72
G8
OSC
1
= 67kHz. A resistor, a
R
S
FF1
Q
CoolMOS™
Gate Driver
Internal
PWM Section
OSC
G9
Gate
&
max
= 100kHz
=0.72.
9
3.4.3
Figure 7
The driver-stage is optimized to minimize EMI and to
provide high circuit efficiency. This is done by reducing
the switch on slope when exceeding the internal
CoolMOS™ threshold. This is achieved by a slope
control of the rising edge at the driver’s output (see
Figure 8).
Figure 8
Thus the leading switch on spike is minimized. When
the integrated CoolMOS™ is switched off, the falling
shape of the driver is slowed down when reaching 2V
to prevent an overshoot below ground. Furthermore the
driver circuit is designed to eliminate cross conduction
of the output stage.
During powerup when VCC is below the undervoltage
lockout threshold V
is low to disable power transfer to the secondary side.
(internal) V
PWM-Latch
Gate Driver
5V
Gate Driver
Gate
Gate Driver
Gate Rising Slope
1
VCC
VCCoff
Functional Description
, the output of the Gate Driver
ca. t = 130ns
CoolSET™-F3
Gate
ICE3xxx65L
8 May 2006
CoolMOS™
t