LNK564DN-TL Power Integrations, LNK564DN-TL Datasheet - Page 6

IC OFFLINE SWIT OTP HV 8SOIC

LNK564DN-TL

Manufacturer Part Number
LNK564DN-TL
Description
IC OFFLINE SWIT OTP HV 8SOIC
Manufacturer
Power Integrations
Series
LinkSwitch®-LPr
Datasheet

Specifications of LNK564DN-TL

Output Isolation
Isolated
Frequency Range
93 ~ 107kHz
Voltage - Output
700V
Power (watts)
3W
Operating Temperature
-40°C ~ 150°C
Package / Case
8-SOIC (0.154", 3.90mm Width) 7 leads
Input / Supply Voltage (max)
265 VAC
Input / Supply Voltage (min)
85 VAC
Duty Cycle (max)
70 %
Switching Frequency
100 kHz
Supply Current
160 uA
Operating Temperature Range
- 40 C to + 150 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
596-1137-2
LinkSwitch-LP Layout Considerations
Layout
See Figure 6 for a recommended circuit board layout for
LinkSwitch-LP (P & G package).
Single Point Grounding
Use a single point ground connection from the input fi lter
capacitor to the area of copper connected to the SOURCE pins.
Bypass Capacitor (C
The BYPASS pin capacitor should be located as near as possible
to the BYPASS and SOURCE pins.
Primary Loop Area
The area of the primary loop that connects the input fi lter
capacitor, transformer primary and LinkSwitch-LP together
should be kept as small as possible.
Primary Clamp Circuit
An external clamp may be used to limit peak voltage on the
Rev. H 11/08
Figure 6. Recommended Circuit Board Layout for LinkSwitch-LP using P Package (Assumes a HVDC Input Stage).
6
TOP VIEW
LNK562-564
T r a n s f o r m e r
BP
Output Filter
)
Capacitor
OUT
DC
+
-
D
S
S
DRAIN pin at turn off. This can be achieved by using an RCD
clamp or a Zener (~200 V) and diode clamp across the primary
winding. In all cases, to minimize EMI, care should be taken
to minimize the circuit path from the clamp components to the
transformer and LinkSwitch-LP.
Thermal Considerations
The copper area underneath the LinkSwitch-LP acts not only as
a single point ground, but also as a heatsink. As it is connected
to the quiet source node, this area should be maximized for
good heat sinking of LinkSwitch-LP. The same applies to the
cathode of the output diode.
Y-Capacitor
The placement of the Y-type cap should be directly from the
primary input fi lter capacitor positive terminal to the common/
return terminal of the transformer secondary. Such a placement
will route high magnitude common-mode surge currents away
from the LinkSwitch-LP device. Note: If an input pi (C, L, C)
EMI fi lter is used, then the inductor in the fi lter should be placed
between the negative terminals on the input fi lter capacitors.
S
BP
FB
S
Maximize hatched copper
areas (
heatsinking
-
HV DC
INPUT
C
BP
+
) for optimum
Input Filter
Capacitor
PI-4157-101305

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