LNK564DN-TL Power Integrations, LNK564DN-TL Datasheet - Page 6
Manufacturer Part Number
IC OFFLINE SWIT OTP HV 8SOIC
Specifications of LNK564DN-TL
93 ~ 107kHz
Voltage - Output
-40°C ~ 150°C
Package / Case
8-SOIC (0.154", 3.90mm Width) 7 leads
Input / Supply Voltage (max)
Input / Supply Voltage (min)
Duty Cycle (max)
Operating Temperature Range
- 40 C to + 150 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
LinkSwitch-LP Layout Considerations
See Figure 6 for a recommended circuit board layout for
LinkSwitch-LP (P & G package).
Single Point Grounding
Use a single point ground connection from the input ﬁ lter
capacitor to the area of copper connected to the SOURCE pins.
Bypass Capacitor (C
The BYPASS pin capacitor should be located as near as possible
to the BYPASS and SOURCE pins.
Primary Loop Area
The area of the primary loop that connects the input ﬁ lter
capacitor, transformer primary and LinkSwitch-LP together
should be kept as small as possible.
Primary Clamp Circuit
An external clamp may be used to limit peak voltage on the
Rev. H 11/08
Figure 6. Recommended Circuit Board Layout for LinkSwitch-LP using P Package (Assumes a HVDC Input Stage).
T r a n s f o r m e r
DRAIN pin at turn off. This can be achieved by using an RCD
clamp or a Zener (~200 V) and diode clamp across the primary
winding. In all cases, to minimize EMI, care should be taken
to minimize the circuit path from the clamp components to the
transformer and LinkSwitch-LP.
The copper area underneath the LinkSwitch-LP acts not only as
a single point ground, but also as a heatsink. As it is connected
to the quiet source node, this area should be maximized for
good heat sinking of LinkSwitch-LP. The same applies to the
cathode of the output diode.
The placement of the Y-type cap should be directly from the
primary input ﬁ lter capacitor positive terminal to the common/
return terminal of the transformer secondary. Such a placement
will route high magnitude common-mode surge currents away
from the LinkSwitch-LP device. Note: If an input pi (C, L, C)
EMI ﬁ lter is used, then the inductor in the ﬁ lter should be placed
between the negative terminals on the input ﬁ lter capacitors.
Maximize hatched copper
) for optimum