TNY278GN Power Integrations, TNY278GN Datasheet - Page 10

IC OFFLINE SWIT OVP OTP HV 8SMD

TNY278GN

Manufacturer Part Number
TNY278GN
Description
IC OFFLINE SWIT OVP OTP HV 8SMD
Manufacturer
Power Integrations
Series
TinySwitch®-IIIr
Datasheet

Specifications of TNY278GN

Output Isolation
Isolated
Frequency Range
124 ~ 140kHz
Voltage - Output
700V
Power (watts)
28W
Operating Temperature
-40°C ~ 150°C
Package / Case
8-SMD Gull Wing, 7 Leads
Output Voltage
12 V
Input / Supply Voltage (max)
265 VAC
Input / Supply Voltage (min)
85 VAC
Duty Cycle (max)
65 %
Switching Frequency
132 KHz
Supply Current
445 uA
Operating Temperature Range
- 40 C to + 150 C
Mounting Style
SMD/SMT
No. Of Outputs
1
Voltage Regulator Case Style
SMD
No. Of Pins
8
Base Number
278
Controller Type
PWM
Frequency
132kHz
Rohs Compliant
Yes
For Use With
596-1194 - KIT DESIGN REF TINYSWITCH-III
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Rev. I 01/09
value (10 Ω to 47 Ω) resistor in series with the bias winding
diode and/or the OVP Zener as shown by R7 and R3 in
Figure 14. The resistor in series with the OVP Zener also limits
the maximum current into the BP/M pin.
Reducing No-load Consumption
As TinySwitch-III is self-powered from the BP/M pin capacitor,
there is no need for an auxillary or bias winding to be provided
on the transformer for this purpose. Typical no-load
consumption when self-powered is <150 mW at 265 VAC input.
The addition of a bias winding can reduce this down to <50 mW
by supplying the TinySwitch-III from the lower bias voltage and
inhibiting the internal high voltage current source. To achieve
this, select the value of the resistor (R8 in Figure 14) to provide
the data sheet DRAIN supply current. In practice, due to the
reduction of the bias voltage at low load, start with a value
equal to 40% greater than the data sheet maximum current,
and then increase the value of the resistor to give the lowest no-
load consumption.
Audible Noise
The cycle skipping mode of operation used in TinySwitch-III can
generate audio frequency components in the transformer. To
limit this audible noise generation the transformer should be
designed such that the peak core fl ux density is below
3000 Gauss (300 mT). Following this guideline and using the
standard transformer production technique of dip varnishing
practically eliminates audible noise. Vacuum impregnation of
the transformer should not be used due to the high primary
capacitance and increased losses that result. Higher fl ux
densities are possible, however careful evaluation of the audible
noise performance should be made using production
transformer samples before approving the design.
Ceramic capacitors that use dielectrics such as Z5U, when
used in clamp circuits, may also generate audio noise. If this is
the case, try replacing them with a capacitor having a different
dielectric or construction, for example a fi lm type.
TinySwitch-lll Layout Considerations
Layout
See Figure 15 for a recommended circuit board layout for
TinySwitch-III.
Single Point Grounding
Use a single point ground connection from the input fi lter
capacitor to the area of copper connected to the SOURCE pins.
Bypass Capacitor (C
The BP/M pin capacitor should be located as near as possible
to the BP/M and SOURCE pins.
EN/UV Pin
Keep traces connected to the EN/UV pin short and, as far as is
practical, away from all other traces and nodes above source
potential including, but not limited to, the BYPASS and DRAIN
pins.
Primary Loop Area
The area of the primary loop that connects the input fi lter
10
TNY274-280
BP
)
capacitor, transformer primary and TinySwitch-III together
should be kept as small as possible.
Primary Clamp Circuit
A clamp is used to limit peak voltage on the DRAIN pin at turn
off. This can be achieved by using an RCD clamp or a Zener
(~200 V) and diode clamp across the primary winding. In all
cases, to minimize EMI, care should be taken to minimize the
circuit path from the clamp components to the transformer and
TinySwitch-III.
Thermal Considerations
The four SOURCE pins are internally connected to the IC lead
frame and provide the main path to remove heat from the
device. Therefore all the SOURCE pins should be connected to
a copper area underneath the TinySwitch-III to act not only as a
single point ground, but also as a heatsink. As this area is
connected to the quiet source node, this area should be
maximized for good heatsinking. Similarly for axial output
diodes, maximize the PCB area connected to the cathode.
Y-Capacitor
The placement of the Y-capacitor should be directly from the
primary input fi lter capacitor positive terminal to the common/
return terminal of the transformer secondary. Such a placement
will route high magnitude common mode surge currents away
from the TinySwitch-III device. Note – if an input π (C, L, C) EMI
fi lter is used then the inductor in the fi lter should be placed
between the negative terminals of the input fi lter capacitors.
Optocoupler
Place the optocoupler physically close to the TinySwitch-III to
minimizing the primary-side trace lengths. Keep the high
current, high voltage drain and clamp traces away from the
optocoupler to prevent noise pick up.
Output Diode
For best performance, the area of the loop connecting the
secondary winding, the output diode and the output fi lter
capacitor, should be minimized. In addition, suffi cient copper
area should be provided at the anode and cathode terminals of
the diode for heatsinking. A larger area is preferred at the quiet
cathode terminal. A large anode area can increase high
frequency radiated EMI.
PC Board Leakage Currents
TinySwitch-III is designed to optimize energy effi ciency across
the power range and particularly in standby/no-load conditions.
Current consumption has therefore been minimized to achieve
this performance. The EN/UV pin undervoltage feature for
example has a low threshold (~1 μA) to detect whether an
undervoltage resistor is present.
Parasitic leakage currents into the EN/UV pin are normally well
below this 1 μA threshold when PC board assembly is in a well
controlled production facility. However, high humidity
conditions together with board and/or package contamination,
either from no-clean fl ux or other contaminants, can reduce the
surface resistivity enough to allow parasitic currents >1 μA to
fl ow into the EN/UV pin. These currents can fl ow from higher
voltage exposed solder pads close to the EN/UV pin such as
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