TNY278GN Power Integrations, TNY278GN Datasheet - Page 9
Manufacturer Part Number
IC OFFLINE SWIT OVP OTP HV 8SMD
Specifications of TNY278GN
124 ~ 140kHz
Voltage - Output
-40°C ~ 150°C
Package / Case
8-SMD Gull Wing, 7 Leads
Input / Supply Voltage (max)
Input / Supply Voltage (min)
Duty Cycle (max)
Operating Temperature Range
- 40 C to + 150 C
No. Of Outputs
Voltage Regulator Case Style
No. Of Pins
For Use With
596-1194 - KIT DESIGN REF TINYSWITCH-III
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Undervoltage lockout is conﬁ gured by R5 connected between
the DC bus and EN/UV pin of U1. When present, switching is
inhibited until the current in the EN/UV pin exceeds 25 μA. This
allows the startup voltage to be programmed within the normal
operating input voltage range, preventing glitching of the output
under abnormal low voltage conditions and also on removal of
the AC input.
In addition to the simple input pi ﬁ lter (C1, L1, C2) for differential
mode EMI, this design makes use of E-Shield™ shielding
techniques in the transformer to reduce common mode EMI
displacement currents, and R2 and C4 as a damping network
to reduce high frequency transformer ringing. These
techniques, combined with the frequency jitter of TNY278, give
excellent conducted and radiated EMI performance with this
design achieving >12 dBμV of margin to EN55022 Class B
conducted EMI limits.
For design ﬂ exibility the value of C7 can be selected to pick one
of the 3 current limits options in U1. This allows the designer to
select the current limit appropriate for the application.
Further ﬂ exibility comes from the current limits between
adjacent TinySwitch-III family members being compatible. The
reduced current limit of a given device is equal to the standard
current limit of the next smaller device and the increased
current limit is equal to the standard current limit of the next
Key Application Considerations
TinySwitch-lll Design Considerations
Output Power Table
The data sheet output power table (Table 1) represents the
minimum practical continuous output power level that can be
obtained under the following assumed conditions:
Standard current limit (I
capacitor and is the normal choice for typical enclosed
When a 1 μF BP/M pin capacitor is used, the current limit is
currents and therefore improved efﬁ ciency, but at the expense
of maximum power capability. This is ideal for thermally
challenging designs where dissipation must be minimized.
When a 10 μF BP/M pin capacitor is used, the current limit is
applications requiring higher peak power or continuous power
where the thermal conditions allow.
The minimum DC input voltage is 100 V or higher for 85 VAC
input, or 220 V or higher for 230 VAC input or 115 VAC with
a voltage doubler. The value of the input capacitance should
be sized to meet these criteria for AC input designs.
Efﬁ ciency of 75%.
Minimum data sheet value of I
Transformer primary inductance tolerance of ±10%.
Reﬂ ected output voltage (V
Voltage only output of 12 V with a fast PN rectiﬁ er diode.
Continuous conduction mode operation with transient K
value of 0.25.
-1) offering reduced RMS device
+1), extending the power capability for
) is selected with a 0.1 μF BP/M pin
) of 135 V.
*Below a value of 1, K
current. To prevent reduced power capability due to premature
termination of switching cycles a transient K
recommended. This prevents the initial current limit (I
being exceeded at MOSFET turn on.
For reference, Table 2 provides the minimum practical power
delivered from each family member at the three selectable
current limit values. This assumes open frame operation (not
thermally limited) and otherwise the same conditions as listed
above. These numbers are useful to identify the correct current
limit to select for a given device and output power requirement.
The output overvoltage protection provided by TinySwitch-III
uses an internal latch that is triggered by a threshold current of
approximately 5.5 mA into the BP/M pin. In addition to an
internal ﬁ lter, the BP/M pin capacitor forms an external ﬁ lter
providing noise immunity from inadvertent triggering. For the
bypass capacitor to be effective as a high frequency ﬁ lter, the
capacitor should be located as close as possible to the
SOURCE and BP/M pins of the device.
Peak Output Power Table
For best performance of the OVP function, it is recommended
that a relatively high bias winding voltage is used, in the range
of 15 V-30 V. This minimizes the error voltage on the bias
winding due to leakage inductance and also ensures adequate
voltage during no-load operation from which to supply the
BP/M pin for reduced no-load consumption.
Selecting the Zener diode voltage to be approximately 6 V
above the bias winding voltage (28 V for 22 V bias winding)
gives good OVP performance for most designs, but can be
adjusted to compensate for variations in leakage inductance.
Adding additional ﬁ ltering can be achieved by inserting a low
Increased current limit is selected for peak and open frame
power columns and standard current limit for adapter
The part is board mounted with SOURCE pins soldered to a
sufﬁ cient area of copper and/or a heatsink is used to keep
the SOURCE pin temperature at or below 110 °C.
Ambient temperature of 50 °C for open frame designs and
40 °C for sealed adapters.
Minimum Practical Power at Three Selectable Current Limit Levels.
11.8 W 15.3 W 19.4 W
15.1 W 19.6 W 23.7 W 11.8 W 15.3 W 18.5 W
23.7 W 28.4 W 32.2 W 18.5 W
230 VAC ± 15%
is the ratio of ripple to peak primary
32.7 W 36.6 W 21.8 W 25.4 W 28.5 W
15.1 W 18.6 W 21.8 W
limit of ≥0.25 is
11.9 W 15.1 W
Rev. I 01/09