S-8261ABSMD-G3ST2G Seiko Instruments, S-8261ABSMD-G3ST2G Datasheet - Page 15

IC LI-ION BATT PROTECT SOT23-6

S-8261ABSMD-G3ST2G

Manufacturer Part Number
S-8261ABSMD-G3ST2G
Description
IC LI-ION BATT PROTECT SOT23-6
Manufacturer
Seiko Instruments
Datasheet

Specifications of S-8261ABSMD-G3ST2G

Function
Over/Under Voltage Protection
Battery Type
Lithium-Ion (Li-Ion), Lithium-Polymer (Li-Pol)
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
SOT-23-6
Output Voltage
4.28 V
Operating Supply Voltage
1.5 V to 28 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Rev.5.0
Test Circuits
Caution
(1) Test Condition 1, Test Circuit 1
(2) Test Condition 2, Test Circuit 2
(3) Test Condition 3, Test Circuit 2
(4) Test Condition 4, Test Circuit 2
(5) Test Condition 5, Test Circuit 2
(Overcharge Detection Voltage, Overcharge Hysteresis Voltage)
(Overdischarge Detection Voltage, Overdischarge Hysteresis Voltage)
(Overcurrent 1 Detection Voltage, Overcurrent 2 Detection Voltage, Load Short-Circuiting Detection Voltage)
(Charger Detection Voltage, Abnormal Charge Current Detection Voltage)
(Normal Operation Current Consumption, Power-Down Current Consumption, Overdischarge Current Consumption)
The overcharge detection voltage (V
to “L” when the voltage V1 is gradually increased from the starting condition of V1 = 3.5 V. The overcharge
hysteresis voltage (V
voltage between VDD and VSS at which V
The overdischarge detection voltage (V
“H” to “L” when the voltage V1 is gradually decreased from the starting condition of V1 = 3.5 V and V2 = 0 V. The
overdischarge hysteresis voltage (V
voltage (V
gradually increased.
The overcurrent 1 detection voltage (V
changing V
time when the voltage V2 is increased rapidly (within 10 μs) from the starting condition V1 = 3.5 V and V2 = 0 V.
The overcurrent 2 detection voltage (V
changing V
time when the voltage V2 is increased rapidly (within 10 μs) from the starting condition V1 = 3.5 V and V2 = 0 V.
The load short-circuiting detection voltage (V
for changing V
detection delay time when the voltage V2 is increased rapidly (within 10 μs) from the starting condition V1 = 3.5 V
and V2 = 0 V.
The charger detection voltage (V
“H” when the voltage V2 is gradually decreased from 0 V after the voltage V1 is gradually increased from the starting
condition of V1 = 1.8 V and V2 = 0 V until the voltage V1 becomes V1 = V
The charger detection voltage can be measured only in the product whose overdischarge hysteresis V
Set V1 = 3.5 V and V2 = 0 V. Decrease V2 from 0 V gradually. The voltage between VM and VSS when V
from “H” to “L” is the abnormal charge current detection voltage. The abnormal charge current detection voltage has
the same value as the charger detection voltage (V
The operating current consumption (I
of V1 = 3.5 V and V2 = 0 V (Normal status).
The power-down current consumption (I
conditions of V1 = V2 = 1.5 V (Overdischarge status).
The operating current consumption (I
of V1 = 3.5 V and V2 = 0 V (Normal status).
The Overdischarge current consumption (I
conditions of V1 = V2 = 1.5 V (Overdischarge status).
For products with power-down function
For products without power-down function
_00
Unless otherwise specified, the output voltage levels “H” and “L” at CO pin (V
judged by the threshold voltage (1.0 V) of the N-channel FET. Judge the CO pin level with respect to
V
VM
DL
DO
DO
and the DO pin level with respect to V
) and the voltage between VDD and VSS at which V
from “H” to “L” lies between the minimum and the maximum value of the overcurrent 1 detection delay
from “H” to “L” lies between the minimum and the maximum value of the overcurrent 2 detection delay
DO
from “H” to “L” lies between the minimum and the maximum value of the load short-circuiting
HC
) is then defined as the difference between the overcharge detection voltage (V
CHA
CU
) is defined as the voltage between VM and VSS at which V
OPE
OPE
HD
) is defined as the voltage between VDD and VSS at which V
DL
) is then defined as the difference between the overdischarge detection
IOV1
IOV2
) is the current that flows through the VDD pin (I
) is the current that flows through the VDD pin (I
) is defined as the voltage between VDD and VSS at which V
PDN
Seiko Instruments Inc.
CO
) is defined as the voltage between VM and VSS whose delay time for
) is defined as the voltage between VM and VSS whose delay time for
OPED
SHORT
) is the current that flows through the VDD pin (I
goes from “L” to “H” when the voltage V1 is gradually decreased.
LOW DROPOUT CMOS VOLTAGE REGULATOR
) is the current that flows through the VDD pin (I
) is defined as the voltage between VM and VSS whose delay time
CHA
SS
.
).
DO
goes from “L” to “H” when the voltage V1 is
DL
+ (V
HD
/ 2).
DD
DD
CO
) under the set conditions
) under the set conditions
) and DO pin (V
S-8261 Series
DO
DD
DD
CO
goes from “L” to
) under the set
) under the set
HD
goes from “H”
DO
≠ 0.
CU
goes from
) and the
CO
DO
goes
) are
15

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