S-8261ABSMD-G3ST2G Seiko Instruments, S-8261ABSMD-G3ST2G Datasheet - Page 16

• Manufacturer Part Number: S-8261ABSMD-G3ST2G
• Description: IC LI-ION BATT PROTECT SOT23-6
• Manufacturer: Seiko Instruments

Specifications of S-8261ABSMD-G3ST2G

• Function: Over/Under Voltage Protection
• Battery Type: Lithium-Ion (Li-Ion), Lithium-Polymer (Li-Pol)
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: SOT-23-6
• Output Voltage: 4.28 V
• Operating Supply Voltage: 1.5 V to 28 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

16
LOW DROPOUT CMOS VOLTAGE REGULATOR
S-8261 Series
(6) Test Condition 6, Test Circuit 3
(7) Test Condition 7, Test Circuit 4
(8) Test Condition 8, Test Circuit 4
(9) Test Condition 9, Test Circuit 5
(10) Test Condition 10, Test Circuit 5
(11) Test Condition 11, Test Circuit 2 (Product with 0 V battery charge function)
(12) Test Condition 12, Test Circuit 2 (Product with 0 V battery charge inhibition function)
(Internal Resistance between VM and VDD, Internal Resistance between VM and VSS)
(CO Pin Resistance “H”, CO Pin Resistance “L”)
(DO Pin Resistance “H”, DO Pin Resistance “L”)
(Overcharge Detection Delay Time, Overdischarge Detection Delay Time)
(Overcurrent 1 Detection Delay Time, Overcurrent 2 Detection Delay Time, Load Short-circuiting Detection
(0 V Battery Charge Starting Charger Voltage)
(0 V Battery Charge Inhibition Battery Voltage)
The resistance between VM and VDD (R
conditions of V1 = 1.8 V and V2 = 0 V.
The resistance between VM and VSS (R
conditions of V1 = 3.5 V and V2 = 1.0 V.
The CO pin resistance “H” (R
= 3.0 V.
The CO pin resistance “L” (R
= 0.5 V.
The DO pin resistance “H” (R
= 3.0 V.
The DO pin resistance “L” (R
= 0.5 V.
The overcharge detection delay time (t
V1 momentarily increases (within 10 μs) from the overcharge detection voltage (V
detection voltage (V
The overdischarge detection delay time (t
voltage V1 momentarily decreases (within 10 μs) from the overdischarge detection voltage (V
overdischarge detection voltage (V
Delay Time, Abnormal Charge Current Detection Delay Time)
The overcurrent 1 detection delay time (t
increases (within 10 μs) from 0 V to 0.35 V under the set condition of V1 = 3.5 V and V2=0 V.
The overcurrent 2 detection delay time (t
increases (within 10 μs) from 0 V to 0.7 V under the set condition of V1 = 3.5 V and V2 = 0 V.
The load short-circuiting detection delay time (t
momentarily increases (within 10 μs) from 0 V to 1.6 V under the set condition of V1 = 3.5 V and V2 = 0 V.
The abnormal charge current detection delay time is the time needed for V
V2 momentarily decreases (within 10 μs) from 0 V to −1.1 V under the set condition of V1 = 3.5 V and V2 = 0 V. The
abnormal charge current detection delay time has the same value as the overcharge detection delay time.
The 0 V battery charge starting charger voltage (V
goes “H” (V
0 V.
The 0 V battery charge inhibition battery voltage (V
V
V and V2 = −4 V.
CO
goes “H” (V
VM
+ 0.1 V or higher) when the voltage V2 is gradually decreased from the starting condition of V1 = V2 =
VM
+ 0.1 V or higher) when the voltage V1 is gradually increased from the starting condition of V1 = 0
CU
) + 0.2 V under the set condition of V2 = 0 V.
COL
DOL
COH
DOH
) is the resistance the CO pin under the set condition of V1 = 4.5 V, V2 = 0 V and V3
) is the resistance the DO pin under the set condition of V1 = 1.8 V, V2 = 0 V and V4
) is the resistance the CO pin under the set condition of V1 = 3.5 V, V2 = 0 V and V3
) is the resistance the DO pin under the set condition of V1 = 3.5 V, V2 = 0 V and V4
DL
) − 0.2 V under the set condition of V2 = 0 V.
CU
) is the time needed for V
IOV1
IOV2
Seiko Instruments Inc.
DL
VMS
VMD
) is the time needed for V
) is the time needed for V
) is the time needed for V
) is the internal resistance between VM and VSS under the set
) is the internal resistance between VM and VDD under the set
SHORT
0CHA
0INH
) is defined as the voltage between VDD and VM at which V
) is the time needed for V
) is defined as the voltage between VDD and VSS at which
CO
to change from “H” to “L” just after the voltage
DO
DO
DO
to go “L” after the voltage V2 momentarily
to go “L” after the voltage V2 momentarily
to change from “H” to “L” just after the
CO
to go from “H” to “L” after the voltage
DO
CU
to go “L” after the voltage V2
) − 0.2 V to the overcharge
DL
) +0.2 V to the
Rev.5.0
_00
CO