MAX712CPE Maxim Integrated Products, MAX712CPE Datasheet - Page 12

IC BATT FASTCHRG NICD/NIMH 16DIP

MAX712CPE

Manufacturer Part Number
MAX712CPE
Description
IC BATT FASTCHRG NICD/NIMH 16DIP
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of MAX712CPE

Function
Charge Management
Battery Type
Nickel Cadmium (NiCd), Nickel Metal-Hydride (NiMH)
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Through Hole
Package / Case
16-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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The voltage loop is stabilized by the output filter
capacitor. A large filter capacitor is required only if the
load is going to be supplied by the MAX712/MAX713 in
the absence of a battery. In this case, set C
where BW
Figure 6 shows the current-regulation loop for a linear-
mode circuit. To ensure loop stability, make sure that
the bandwidth of the current regulation loop (BW
lower than the pole frequency of transistor Q1 (f
BW
The pole frequency of the PNP pass transistor, Q1, can
be determined by assuming a single-pole current gain
response. Both f
data sheet for the particular transistor used for Q1.
The MAX712/MAX713 dissipate power due to the cur-
rent-voltage product at DRV. Do not allow the power
dissipation to exceed the specifications shown in the
Absolute Maximum Ratings. DRV power dissipation can
be reduced by using the cascode connection shown in
Figure 5.
The MAX712/MAX713’s internal analog-to-digital con-
verter has 2.5mV of resolution. It determines if the bat-
tery voltage is rising, falling, or unchanging by
comparing the battery’s voltage at two different times.
After power-up, a time interval of t
to 168sec passes (see Table 3 and Figure 8), then a
battery voltage measurement is taken. It takes 5ms to
perform a measurement. After the first measurement is
complete, another t
second measurement is taken. The two measurements
are compared, and a decision whether to terminate
charge is made. If charge is not terminated, another full
two-measurement cycle is repeated until charge is
NiCd/NiMH Battery
Fast-Charge Controllers
12
C
f
Condition for Stability of Current-Regulation Loop:
CRL
B
OUT
Power dissipation due to DRV sink current =
______________________________________________________________________________________
in Hz = f
by selecting C2.
(in farads) = (50 x I
(current into DRV) x (voltage on DRV)
(10,000 recommended)
I
V
BW
VRL
LOAD
OUT
CRL
T
= loop bandwidth in Hz
/B
= programmed output voltage
= external load current in amps
T
o
gm = 0.0018 Siemens
in Hz = gm/C2, C2 in farads,
(V
, f
and B
C
LIMIT
T
OUT
in Hz, B
A
interval passes, and then a
o
x number of cells)
> 10µF
BW
should be specified on the
LOAD
Voltage-Slope Cutoff
o
CRL
= DC current gain
)/(V
< f
A
ranging from 21sec
OUT
B
Current Loop
x BW
OUT
VRL
as:
CRL
B
)
). Set
) is
terminated. Note that each cycle has two t
and two voltage measurements.
The MAX712 terminates fast charge when a compari-
son shows that the battery voltage is unchanging. The
MAX713 terminates when a conversion shows the bat-
tery voltage has fallen by at least 2.5mV per cell. This is
the only difference between the MAX712 and MAX713.
Figure 9a shows how the MAX712/MAX713 detect over-
and under-temperature battery conditions using negative
temperature coefficient thermistors. Use the same model
thermistor for T1 and T2 so that both have the same
nominal resistance. The voltage at TEMP is 1V (referred
to BATT-) when the battery is at ambient temperature.
The threshold chosen for THI sets the point at which
fast charging terminates. As soon as the voltage-on
TEMP rises above THI, fast charge ends, and does not
restart after TEMP falls below THI.
The threshold chosen for TLO determines the tem-
perature below which fast charging will be inhibited.
If TLO > TEMP when the MAX712/MAX713 start up, fast
charge will not start until TLO goes below TEMP.
The cold temperature charge inhibition can be disabled
by removing R5, T3, and the 0.022μF capacitor; and by
tying TLO to BATT-.
To disable the entire temperature comparator charge-
cutoff mechanism, remove T1, T2, T3, R3, R4, and R5,
and their associated capacitors, and connect THI to V+
and TLO to BATT-. Also, place a 68kQ resistor from
REF to TEMP, and a 22kΩ resistor from BATT- to TEMP.
Figure 8. Voltage Slope Detection
0
INTERVAL
NOTE: SLOPE PROPORTIONAL TO VBATT
t
A
ms
5
VOLTAGE
INTERVAL INTERVAL INTERVAL INTERVAL INTERVAL
RISES
t
A
ms
5
POSITIVE RESIDUAL
Temperature Charge Cutoff
t
A
CUTOFF FOR MAX712
ms
5
VOLTAGE
SLOPE
ZERO
t
A
ms
5
RESIDUAL
ZERO
t
A
CUTOFF FOR MAX712
ms
5
OR MAX713
NEGATIVE
VOLTAGE
SLOPE
t
A
A
ms
5
intervals
NEGATIVE
RESIDUAL
t

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