MAX6950EEE+ Maxim Integrated Products, MAX6950EEE+ Datasheet - Page 10
![IC DRVR DSPL LED SRL 16-QSOP](/photos/7/35/73543/16-qsop_21-0112_sml.jpg)
MAX6950EEE+
Manufacturer Part Number
MAX6950EEE+
Description
IC DRVR DSPL LED SRL 16-QSOP
Manufacturer
Maxim Integrated Products
Datasheet
1.MAX6950CEE.pdf
(19 pages)
Specifications of MAX6950EEE+
Display Type
LED
Configuration
7 Segment
Interface
3-Wire Serial
Digits Or Characters
5 Digits
Current - Supply
10mA
Voltage - Supply
2.7 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
16-QSOP Exposed Pad, 16-eQSOP , 16-HQSOP
Number Of Digits
5
Number Of Segments
40
Low Level Output Current
400 mA
High Level Output Current
- 50 mA
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Supply Current
15 mA
Maximum Power Dissipation
667 mW
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Each LED digit is represented by 2 bytes of memory, 1
byte in plane P0 and the other in plane P1. Each LED
digit’s segment is represented by 2 bits of memory, 1
bit from the appropriate byte in each plane. The digit
Serially Interfaced, +2.7V to +5.5V,
5- and 8-Digit LED Display Drivers
Table 5. Configuration Register Format
Table 6. Shutdown Control (S Data Bit D0) Format
Table 7. Blink Rate Selection (B Data Bit D2) Format
Table 8. Global Blink Enable/Disable (E Data Bit D3) Format
Table 9. Global Blink Timing Synchronization (T Data Bit D4) Format
10
Blink timing counters
are unaffected
Blink timing counters
are cleared on the
rising edge of CS
S l ow - b l i nki ng seg m ents
b l i nk on for 1s, off for 1s
w i th f
Fast-blinking segments
blink on for 0.5s, off for
0.5s with f
Shutdown
Normal operation
Blink function is
disabled
Blink function is
enabled
Configuration register
______________________________________________________________________________________
OS C
MODE
MODE
MODE
MODE
MODE
= 4M H z
OSC
= 4MHz
CODE (HEX)
CODE (HEX)
CODE (HEX)
CODE (HEX)
CODE (HEX)
ADDRESS
ADDRESS
ADDRESS
ADDRESS
ADDRESS
0x04
0x04
0x04
0x04
0x04
0x04
0x04
0x04
0x04
D7
D7
D7
D7
D7
X
X
X
X
X
X
X
X
X
D6
D6
D6
D6
D6
X
X
X
X
X
X
X
X
X
registers are mapped so that a digit’s data can be
updated in plane P0, or plane P1, or both planes at the
same time (Table 3).
D5
D5
D5
D5
D5
R
R
R
R
R
R
R
R
R
REGISTER DATA
REGISTER DATA
REGISTER DATA
REGISTER DATA
REGISTER DATA
D4
D4
D4
D4
D4
0
1
T
T
T
T
T
T
T
D3
D3
D3
D3
D3
E
E
E
E
E
E
E
0
1
D2
D2
D2
D2
D2
B
B
B
B
B
B
B
0
1
D1
D1
D1
D1
D1
0
0
0
0
0
0
0
0
0
D0
D0
D0
D0
D0
S
S
S
S
S
S
S
0
1