LTC5100EUF Linear Technology, LTC5100EUF Datasheet
LTC5100EUF
Specifications of LTC5100EUF
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LTC5100EUF Summary of contents
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... Status information is available from the I back and statistical process control. An internal digital controller compensates laser tempera- ture drift and provides extensive laser safety features. , LTC and LT are registered trademarks of Linear Technology Corporation trademark of Philips Electronics N.V. *Vertical Cavity Surface Emitting Laser **Downloadable from www ...
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... Transmitter Enabled, Is_rng = Im_rng = 3 Impp = 24mA Peak-to-Peak Differential Voltage (The Single- Ended Peak-to-Peak Voltage is One Half the Differential Voltage) Cml_en = 0 (Note 4) Cml_en = 0 (Note 5) Cml_en = 0 (Note 5) Is_rng = 0 Is_rng = 1 Is_rng = 2 Is_rng = ORDER PART TOP VIEW NUMBER LTC5100EUF MODA 17 10 MODB PART MARKING 5100 ...
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ELECTRICAL CHARACTERISTICS temperature range, otherwise specifications are at T resistor from SRC (Pin 14) to MODA (Pin 11 load AC coupled to MODB (Pin 10); 10nF, 10% capacitor from SRC (Pin 14 Cml_en = ...
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LTC5100 ELECTRICAL CHARACTERISTICS temperature range, otherwise specifications are at T resistor from SRC (Pin 14) to MODA (Pin 11 load AC coupled to MODB (Pin 10); 10nF, 10% capacitor from SRC (Pin 14 Cml_en ...
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ELECTRICAL CHARACTERISTICS temperature range, otherwise specifications are at T resistor from SRC (Pin 14) to MODA (Pin 11 load AC coupled to MODB (Pin 10); 10nF, 10% capacitor from SRC (Pin 14 Cml_en = ...
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LTC5100 ELECTRICAL CHARACTERISTICS temperature range, otherwise specifications are at T resistor from SRC (Pin 14) to MODA (Pin 11 load AC coupled to MODB (Pin 10); 10nF, 10% capacitor from SRC (Pin 14 Cml_en ...
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ELECTRICAL CHARACTERISTICS Note 10: The modulation current can be programmed to near zero in each range, but the high speed performance is not guaranteed for currents less than the specified minimum. Note 11: The effective resolution of the modulation current ...
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LTC5100 W U TYPICAL PERFOR A CE CHARACTERISTICS 3.3V Cml_en = 0, Lpc_en = 1, transmitter enabled, unless otherwise noted. Test circuit shown in Figure 5. DD DD(HS) A Optical Eye Diagram ...
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W U TYPICAL PERFOR A CE CHARACTERISTICS 3.3V Cml_en = 0, Lpc_en = 1, transmitter enabled, unless otherwise noted. Test circuit shown in Figure 5. DD DD(HS) A Rise and Fall Times ...
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LTC5100 W U TYPICAL PERFOR A CE CHARACTERISTICS 3.3V Cml_en = 0, Lpc_en = 1, transmitter enabled, unless otherwise noted. DD DD(HS) A Hot Plug with EN Active in CCC Mode V ...
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CTIO S V (Pins 12, 17): Ground for Digital, Analog and SS High Speed Circuitry. These pins are internally connected. Connect Pins and 12 to the ground plane with ...
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LTC5100 W BLOCK DIAGRA Under_voltage UNDERVOLTAGE DETECTION EN 15 100 A 100 A SDA 6 SCL 7 I S(MON) I M(MON MD(MON) TEMP SENSOR V TERM(MON) sel V DD(HS DD(HS) CML_en 20pF ...
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CTIO AL DIAGRA SDA 6 SCL 7 Imd nom TEMP Imd tc1 SENSOR Imd tc2 T int adc + ADC – T ext T nom Ext temp en Im tc1 Im ...
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LTC5100 CTIO AL DIAGRA SDA 6 SCL 7 Ib nom TEMP Ib tc1 SENSOR Ib tc2 T int adc + ADC – T ext T nom Ext temp en Im tc1 ...
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TEST CIRCUIT FROM BERT EQUIVALE T I PUT A D OUTPUT CIRCUITS LTC5100 ACTIVE LOW EN 15 En_polarity 1 EN ACTIVE HIGH Figure 6. Equivalent Circuit ...
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LTC5100 U U EQUIVALE T I PUT A D OUTPUT CIRCUITS LTC5100 R 3 Cml_en ON V 20pF DD(HS 25k V DD(HS) 50 – Figure 10. Equivalent Circuit for the IN U OPERATIO OVERVIEW ...
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U OPERATIO LASER BIAS AND MODULATION Modulator Architecture The LTC5100 drives common cathode lasers using a method called “shunt switching”. As shown in Figure 12, shunt switching involves sourcing DC current into the laser diode and shunting part of that ...
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LTC5100 U OPERATIO current The maximum value Electrical Characteristics and the value of I the laser characteristics and the termination resistor value. The logic “1” and “0” current levels in the laser are given by: ...
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U OPERATIO monitor photodiode current. In each case the fundamental calculation is the same. The LTC5100’s digital controller multiplies the nominal value of the quantity ( quadratic function of temperature. Temperature mea- surements are supplied either by an ...
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LTC5100 U OPERATIO Figure 17 depicts the current ranges for the source cur- rent. The guaranteed full scale is 6mA per range. The minimum operating level should be limited to 1/16 of full scale to avoid the coarse relative quantization ...
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U OPERATIO Figure 19 shows how the LTC5100 achieves a low reflec- tion coefficient. The unavoidable capacitance of the high speed driver transistor, bond pads and ESD protection circuitry (C1) is compensated by the inductance of the bond wires (L ...
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LTC5100 U OPERATIO approximately second order characteristics. The design maximizes the flatness of the step response over extended periods, giving optimal performance during long strings of ones or zeros in the data. MODULATION CURRENT CONTROL IN APC AND CCC MODES ...
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U OPERATIO Reducing Im_gain slows the settling time and increasing Im_gain speeds the settling time. For example, with Im_gain = 1, the residual loop error is cut by 1/8 with each servo iteration. In this case it would take 35 ...
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LTC5100 U OPERATIO (LOG SCALE) MD 2176 544 Imd_rng = 2 136 Imd_rng = 1 34 Imd_rng = Figure 24. Operating Ranges for the Monitor Diode Current The SRC pin current range, Is_rng, should ...
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U OPERATIO Equation 20 shows that the loop gain is completely inde- pendent of the slope efficiency and monitor diode re- sponse. Consequently the servo dynamics and settling time are independent of these highly varying quantities. The Apc_gain quantity can ...
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LTC5100 U OPERATIO current can be temperature compensated with first and second order temperature coefficients. Servo Control The laser bias current is controlled by a digital servo loop (shown in the upper half of Figure 4) and can be under- ...
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U OPERATIO by an on-chip temperature sensor external microprocessor, according to the setting of Ext_temp_en. The temperature compensated expression for Ib_set is given by • Ib set Ib nom _ _ • ...
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LTC5100 U OPERATIO The EN pin and the Soft_en bit must both be active to enable the transmitter, providing an extra degree of safety and allowing full software control of the transmitter enable function. As shown in Figure 6, the ...
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U OPERATIO fault has occurred. For example, the software in the host system may need to evaluate the cause of the fault before shutting down the laser. If Auto_shutdn_en = 1, the LTC5100 automatically disables the transmitter after a fault. ...
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LTC5100 U OPERATIO Conversion Sequence The ADC has a 1ms conversion time and operates in a four- cycle sequence. Three of these cycles are dedicated to the needs of the servo controllers for laser bias and modula- tion current. One ...
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U OPERATIO Table 3. Example of User ADC Cycle Access ADC WRITE TO CYCLE SIGNAL SOURCE Adc_src_sel User (V ) TERM ...
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LTC5100 U OPERATIO Standalone Operation On power-up the LTC5100 becomes an I and attempts to load its configuration data from an exter- nal EEPROM EEPROM responds, the LTC5100 reads 16-bytes of data and transfers this data to the ...
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U OPERATIO Table 6. Effective Base Addresses for Various Sized EEPROMs GENERIC PART NUMBER 24LC00 Bits 128 Bytes 16 Device Address (Binary) 1010xxx. Word Address Space (Binary) xxxx_nnnn LTC5100 Generates 1010_111. Device Address = 0xAE LTC5100 Generates 0110_0000 Word Address ...
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LTC5100 U U REGISTER DEFI ITIO S Table 7. Register Set Overview CONSTANT CURRENT REGISTER GROUP CONTROL MODE System Operating SYS_CONFIG Configuration LOOP_GAIN PEAKING Reserved Laser Setup Coefficients IB IB_TC1 IB_TC2 IM IM_TC1 IM_TC2 Temperature T_EXT T_NOM Fault Monitoring FLT_CONFIG ...
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U U REGISTER DEFI ITIO S Table 8. Register: SYS_CONFIG—System Configuration (I REGISTER RESET VALUE .BITFIELD BIT (BIN) .Reserved 15:8 .Cml_en 7 0 .Md_polarity 6 0 .Ext_temp_en 5 0 .Power_down_en 4 1 .Apc_en 3 0 .En_polarity 2 0 .Soft_en 1 ...
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LTC5100 U U REGISTER DEFI ITIO S Table 9. Register: LOOP_GAIN—Control Loop Gain (I REGISTER RESET VALUE .BITFIELD BIT (BIN) .Reserved 15:8 .Ib_gain 7 0 (.Apc_gain in APC 6 0 Mode Im_gain 2 0 ...
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U U REGISTER DEFI ITIO S Table 12. Register: IB (IMD)—Laser Bias Current Register (Monitor Diode Current in APC Mode) (I REGISTER RESET VALUE .BITFIELD BIT (BIN) .Reserved 15:12 .Is_rng .Ib_nom 9 0 (.Imd_nom in 8 ...
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LTC5100 U U REGISTER DEFI ITIO S Table 14. Register: IB_TC2 (IMD_TC2)—Laser Bias/Monitor Diode Current Second Order Temperature Coefficient Command Code 0x17) REGISTER RESET VALUE .BITFIELD BIT (BIN) .Reserved 15:8 .Ib_tc2 (.Imd_tc2 APC Mode) ...
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U U REGISTER DEFI ITIO S Table 16. Register: IM_TC1—Laser Modulation Current First Order Temperature Coefficient (I REGISTER RESET VALUE .BITFIELD BIT (BIN) .Reserved 15:8 .Im_tc1 ...
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LTC5100 U U REGISTER DEFI ITIO S Table 19. Register: T_NOM—Nominal Temperature (Includes Imd_rng) (I REGISTER RESET VALUE .BITFIELD BIT (BIN) .Reserved 15:12 .Imd_rng .T_nom ...
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U U REGISTER DEFI ITIO S Table 20. Register: FLT_CONFIG—Fault Configuration (Refer also to Table 1) (I REGISTER RESET VALUE .BITFIELD BIT (BIN) .Reserved 15:12 Rep_flt_inhibit 11 0 Rapid_restart_en 10 1 Flt_drv_mode Lpc_en 7 1 Auto_shutdn_en ...
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LTC5100 U U REGISTER DEFI ITIO S Table 21. Register: FLT_STATUS—Fault Status (I REGISTER RESET VALUE .BITFIELD BIT (BIN) .Reserved 15:11 .Transmit_ready 10 0 .Transmitter_ 9 0 enabled .En_pin_state 8 Varies .Faulted_twice 7 0 .Faulted_once 6 1 .Faulted 5 1 ...
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U U REGISTER DEFI ITIO S Table 22. Register: IB_LIMIT—Laser Bias Current Limit (I REGISTER RESET VALUE .BITFIELD BIT (BIN) .Reserved 15:7 .Ib_limit Table 23. Register: ...
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LTC5100 U U REGISTER DEFI ITIO S Table 24. Register: USER_ADC—Reading (I REGISTER RESET VALUE .BITFIELD BIT (BIN) .Reserved 15 .Adc_src .Reserved 11 .Valid 10 0 .Data ...
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U U REGISTER DEFI ITIO S Table 26. Register: IM_ADC—Modulation Current ADC (I REGISTER RESET VALUE .BITFIELD BIT (BIN) .Reserved 15:10 .Im_adc ...
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LTC5100 U U REGISTER DEFI ITIO S Table 29. Register: IM_DAC—Modulation Current DAC (I REGISTER RESET VALUE .BITFIELD BIT (BIN) .Reserved 15:10 .Im_dac ...
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U U APPLICATIO S I FOR ATIO HIGH SPEED DESIGN AND LAYOUT Figure 29 and Figure 30 show the schematic and layout of a minimum component count circuit for standalone op- eration. The exposed pad of the package is soldered ...
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LTC5100 U U APPLICATIO S I FOR ATIO The termination resistor, R1, and its decoupling capacitor, C1, are placed as close as possible to the LTC5100 to reduce inductance. Inductance in these two components causes high frequency peaking and overshoot ...
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U U APPLICATIO S I FOR ATIO Figure 31 and Figure 32 show the schematic and layout of a minimum reflection coefficient, minimum peaking solu- tion. Two capacitors, C1 and C2 are used to further reduce the inductance in the ...
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LTC5100 U U APPLICATIO S I FOR ATIO The laser’s monitor diode (if needed) can be attached to either pin of 2-pin header H2 (labeled MD the test turret labeled MD 2mm, 2-pin header with ...
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... LT1812CS5 H3 1 CCIJ2mm-138G Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights DESCRIPTION 1-Pin Terminal Turret Test Point ...
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... Tiny, Low Noise Avalanche Photodiode Bias Supply” www.linear.com BOTTOM VIEW—EXPOSED PAD 0.75 0. 0.115 TYP 15 16 2.15 0.10 (4-SIDES) 0.200 REF 0.00 – 0.05 sn5100 5100fs LT/TP 0903 1K • PRINTED IN USA LINEAR TECHNOLOGY CORPORATION 2003 0.55 0. (UF) QFN 0802 0.30 0.05 0.65 BSC ...