TLE6217G Infineon Technologies, TLE6217G Datasheet - Page 9

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TLE6217G

Manufacturer Part Number
TLE6217G
Description
IC LOW SIDE SWITCH 4CHAN PDSO-20
Manufacturer
Infineon Technologies
Type
Low Sider
Datasheet

Specifications of TLE6217G

Input Type
Non-Inverting
Number Of Outputs
4
On-state Resistance
350 mOhm
Current - Output / Channel
3A
Current - Peak Output
5A
Voltage - Supply
4.8 V ~ 32 V
Operating Temperature
-40°C ~ 150°C
Mounting Type
Surface Mount
Package / Case
DSO-20
Packages
PG-DSO-20
Thermal Class
Heatslug down
Id Nom
4 x 1 A
Pin Count
20.0 Pins
Channels
4.0
Comment
4 Channel direct input control with status pins
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
SP000013947
SP000435876
TLE6217GT

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
TLE6217G
Manufacturer:
INFINEON/英飞凌
Quantity:
20 000
Open load is detected for all four channels in on and off mode.
In the on mode the load current is monitored. If it drops below the specified threshold value IQU then an
open load condition is detected.
In the off mode, the output voltage is monitored. An open load condition is detected when the output
voltage of a given channel is below the threshold V
prevent an open load diagnosis in case of transient Voltages on the outputs the open load detection in
off mode uses a filter of typ. 30µs.
Status output at pulse width operation
If the input is operated with a pulsed signal, the status does not follow each single pulse of the input sig-
nal. An internal delay t
timing diagrams on the following pages for further information.
This internal status delay simplifies diagnostic software for pwm applications.
Diagnostic Table
In general the status follows the input signal in normal operating conditions.
If any error is detected the status is inverted.
Operating Condition
Standby
Normal function
Open load or short to ground
Overload or short to supply
Overtemperature
Note 1) : overload/short-to-supply/overtemperature - events shorter than min. time t
will not be latched and not reported at the status pin.
V5
reset latch
reset latch
2)
2)
1)
D
of typ. 1.2ms (min 500 s) enables a continuous status output signal. See the
1)
Standby
STBY
Input
H
H
H
H
H
H
H
H
H
H
H
H
H
L
P r e l i m i n a r y D a t a s h e e t T L E 6 2 1 7
Page 9 of 20
Enable
DS(OL)
ENA
Input
X
H
H
H
H
H
H
H
H
L
L
L
L
L
, which is typ. 33 % of the supply voltage VS. To
Control
H
H
Input
IN
X
X
H
H
H
H
X
H
X
L
L
L
L
L
Power
Output
ON
ON
off
off
off
off
off
off
off
off
off
off
off
off
Q
30. 07. 2002
DSO
specified in 2.10
Output
Status
ST
H
H
H
H
H
L
L
L
L
L
L
L
L
L

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