A3949SLBTR-T Allegro Microsystems Inc, A3949SLBTR-T Datasheet

IC MOTOR DRIVER PWM FULL 16-SOIC

A3949SLBTR-T

Manufacturer Part Number
A3949SLBTR-T
Description
IC MOTOR DRIVER PWM FULL 16-SOIC
Manufacturer
Allegro Microsystems Inc
Datasheet

Specifications of A3949SLBTR-T

Applications
PWM Motor Driver
Number Of Outputs
1
Current - Output
±2.8A
Voltage - Supply
8 V ~ 36 V
Operating Temperature
-20°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
16-SOIC (0.300", 7.5mm Width)
Motor Type
Full Bridge
No. Of Outputs
1
Output Current
2.8A
Output Voltage
36V
Supply Voltage Range
8V To 36V
Driver Case Style
SOIC
No. Of Pins
16
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Voltage - Load
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
620-1131-2
A3949SLBTR-T

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
A3949SLBTR-T
Manufacturer:
INTERSIL
Quantity:
201
Part Number:
A3949SLBTR-T
Manufacturer:
ALLEGRO/雅丽高
Quantity:
20 000
Features and Benefits
▪ Single supply operation
▪ Very small outline package
▪ Low R
▪ Sleep function
▪ Internal UVLO
▪ Crossover current protection
▪ Thermal shutdown protection
Packages:
Not to scale
29319.47i
DS(ON)
outputs
Package LB, 16-pin SOIC
with internally fused pins
ENABLE
PHASE
SLEEP
MODE
.22 μF
25 V
Gate Supply
Low Side
Functional Block Diagram
VREG
Control
Logic
DMOS Full-Bridge Motor Driver
OSC
DMOS Full Bridge
Description
Designed for PWM (pulse width modulated) control of DC
motors, the A3949 is capable of peak output currents to ±2.8 A
and operating voltages to 36 V.
PHASE and ENABLE input terminals are provided for use
in controlling the speed and direction of a DC motor with
externally applied PWM control signals. Internal synchronous
rectification control circuitry is provided to reduce power
dissipation during PWM operation.
Internal circuit protection includes thermal shutdown with
hysteresis, undervoltage monitoring of V
crossover current protection.
The A3949 is supplied in a power package, a 16-pin plastic SOIC
with a copper batwing tab (part number suffix LB). The packages
are lead (Pb) free, with 100% matte tin leadframes.
CP1
Charge
0.1 μF
Pump
CP2
VCP
VBB
OUTA
OUTB
SENSE
GND
GND
0.1 μF
0.1 μF
100 μF
Supply
Load
BB
A3949
and V
CP
, and

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A3949SLBTR-T Summary of contents

Page 1

Features and Benefits ▪ Single supply operation ▪ Very small outline package ▪ Low R outputs DS(ON) ▪ Sleep function ▪ Internal UVLO ▪ Crossover current protection ▪ Thermal shutdown protection Packages: Package LB, 16-pin SOIC with internally fused pins ...

Page 2

... A3949 Selection Guide Part Number A3949SLBTR-T 16-pin, SOIC Absolute Maximum Ratings Characteristic Load Supply Voltage Logic Input Voltage Sense Voltage Output Current, Repetitive Operating Ambient Temperature Maximum Junction Temperature Storage Temperature Package Thermal Characteristics* Characteristic Package Thermal Resistance *Additional information is available on the Allegro website. ...

Page 3

A3949 ELECTRICAL CHARACTERISTICS Characteristics Output-On Resistance Body Diode Forward Voltage Motor Supply Current Logic Input Voltage PHASE, ENABLE, MODE Logic Input Voltage SLEEP Logic Input Current PHASE, MODE pins Logic Input Current ENABLE pin Logic Input Current SLEEP pin Propagation ...

Page 4

A3949 PWM Control Timing Diagram SLEEP ENABLE PHASE MODE V BB OUTA OUTB OUT OUTA 1 2 DMOS Full-Bridge Motor Driver VBB OUTA OUTB 5 ...

Page 5

A3949 VREG. This supply voltage is used to operate the sink- side DMOS outputs. VREG is internally monitored and in the case of a fault condition, the outputs of the device are disabled. The VREG pin should be decoupled with ...

Page 6

A3949 Name N/C MODE PHASE GND SLEEP ENABLE OUTA SENSE VBB OUTB CP1 CP2 GND VCP VREG N/C *These pins are internally connected. DMOS Full-Bridge Motor Driver LB Package N N/C MODE 2 15 VREG PHASE 3 14 ...

Page 7

A3949 10. 16X 0.10 C 0.41 1.27 Copyright ©2003-2010, Allegro MicroSystems, Inc. Allegro MicroSystems, Inc. reserves the right to make, from time to time, such de par tures from the detail spec tions ...

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