ICE1CS02 Infineon Technologies, ICE1CS02 Datasheet - Page 10

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ICE1CS02

Manufacturer Part Number
ICE1CS02
Description
IC PFC CTRLR AVERAGE CURR 16DIP
Manufacturer
Infineon Technologies
Datasheet

Specifications of ICE1CS02

Mode
Average Current
Frequency - Switching
65kHz
Current - Startup
1.3mA
Voltage - Supply
11 V ~ 25 V
Operating Temperature
-40°C ~ 150°C
Mounting Type
Through Hole
Package / Case
16-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
SP000444084

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3.4
The IC operates with a cascaded control; the inner
current loop and the outer voltage loop. The inner
current loop of the IC controls the sinusoidal profile for
the average input current. It uses the dependency of
the PWM duty cycle on the line input voltage to
determine the corresponding input current. This means
the average input current follows the input voltage as
long as the device operates in CCM. Under light load
condition, depending on the choke inductance, the
system may enter into discontinuous conduction mode
(DCM). In DCM, the average current waveform will be
distorted but the resultant harmonics are still low
enough to meet the Class D requirement of IEC 1000-
3-2.
The outer voltage loop controls the output bus voltage.
Depending on the load condition, OTA1 establishes an
appropriate voltage at VCOMP pin which controls the
amplitude of the average input current.
The IC is equipped with various protection features to
ensure safe operating condition for both the system
and device. Important protection features are namely
Brown-out protection, Current Limitation and Output
Under-voltage Protection.
3.4.1
An internal under voltage lockout (UVLO) block
monitors the VCC power supply. As soon as it exceeds
12V and the voltage at pin 2 (PFC VSENSE) is >0.6V,
the IC begins operating its gate drive and performs its
Startup as shown in Figure 5.
.
Figure 5
If VCC drops below 11V, the IC is off. The IC will then
be consuming typically 1.3mA. The IC can be turned off
and forced into standby mode by pulling down the
voltage at pin 2 (PFC VSENSE) to lower than 0.6V.
3.4.2
Figure 6 shows the operation of voltage loop’s OTA1
during startup. The VCOMP pin is pull internally to
Version 1.0
IC's
State
V
CC
12 V
OFF
PFC Section
Power Supply
Start-up
State of Operation respect to VCC
Start
Up
V
VSENSE
Operation
Normal
> 0.6 V
Open loop/
V
Standby
VSENSE
< 0.6 V
Operation
V
Normal
VSENSE
> 0.6 V
11 V
OFF
t
10
ground via switch S1 during UVLO and other fault
conditions (see later section on “System Protection”).
During power up when V
rated level, it sources a constant 30µA into the
compensation network at VCOMP pin, causing the
voltage at this pin to rise linearly. This results in a
controlled linear increase of the input current from 0A
thus reducing the stress on the external component.
When V
VCOMP voltage is level-shifted by the Enhance
Dynamic Response function, to ensure there is no long
period of low or no current.
When V
sourcing current drops and so does the level shift of the
window detect block. The normal voltage loop then
takes control.
Figure 6
3.4.3
The IC provides several protection features in order to
ensure the PFC system in safe operating range.
Depending on the input line voltage (V
bus voltage (V
when these protections are active.
(
C 4
R 6
OUT
OUT
R 3 + R 4
Combi PFC/ PWM Controller
R 4
System Protection
is within 83% and 95% of the rated value,
V S E N S E
V C O M P
Start-up
approaches its rated value, OTA1’s
OUT
x V
), Figure 7 and 8 show the conditions
C 5
O U T
)
Functional Description
OUT
S 1
is less than 83% of the
O T A 1
ICE1CS02
25 July 2008
IN
p ro te c t
) and output
3 V

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