SG6903SZ Fairchild Semiconductor, SG6903SZ Datasheet - Page 16

IC PFC CONTROLLER 16SOIC

SG6903SZ

Manufacturer Part Number
SG6903SZ
Description
IC PFC CONTROLLER 16SOIC
Manufacturer
Fairchild Semiconductor
Datasheet

Specifications of SG6903SZ

Mounting Type
Surface Mount
Package / Case
16-SOIC (3.9mm Width)
Output Voltage
1.5 V to 8 V
Switching Frequency
65 KHz
Operating Temperature Range
- 20 C to + 85 C
Mounting Style
SMD/SMT
Duty Cycle (max)
83 %
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Voltage - Supply
-
Operating Temperature
-
Frequency - Switching
-
Mode
-
Current - Startup
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Green Mode PFC/Flyback-PWM Controller
Multi-vector Error Amplifier
voltage loop for better input power factor, the innovative
Multi-Vector Error Amplifier provides a fast transient
response to clamp the overshoot and undershoot of the
PFC output voltage.
multi-vector error amplifier. When the variation of the
feedback voltage exceeds ± 5% of the reference voltage,
the trans-conductance error amplifier will adjust its output
impedance to increase the loop response.
OVP
THE OPFC will not be enabled again until the FBPFC
voltage falls below OVP
Cycle-by-cycle Current Limiting
for both PFC and PWM stages. The voltage of V
determines the voltage of V
V
drive will be terminated once the voltage on ISENSE pin
goes below V
determined by the internal current reference according to
the following equation:
© System General Corp.
Version 1.0.1 (IAO33.0061.B0)
PK
and VRMS is also shown in Figure 7. The PFC gate
FBPFC
Although the PFC stage has a low bandwidth
Figure 6 shows the block diagram of the
Once the voltage on the FBPFC pin is over
SG6903 provides cycle-by-cycle current limiting
The amplitude of the constant current I
, the OPFC of the SG6903 will be disabled.
FIG. 6 Multi-vector error amplifier
PK
.
FBPFC
PK
.
. The relationship between
P
RMS
is
- 16 -
(V
Flyback PWM and Slope Compensation
utilized for Flyback PWM. The SG6903 inserts a
synchronized 0.5V ramp at the beginning of each
switching cycle. This built-in slope compensation ensures
stable operation for continuous current-mode operation.
reaches the threshold voltage (0.9V), the OPWM will be
turned off after a small propagation delay t
oscillation, a synchronized positive-going ramp in
inserted at every switching cycle.
RMS
Therefore the peak current of the I
As shown in Figure 8, peak-current-mode control is
When the IPWM voltage, across the sense resistor,
To improve stability or prevent sub-harmonic
<1.05V),
I
I
P
SENSE_peak
FIG. 7 VRMS controlled current limiting
=
2
×
FIG. 8 Peak current control loop
1.2V
www.sg.com.tw • www.fairchildsemi.com
R
I
=
(I
--------------------- (8)
P
×
R
R
P
- )
S
0.2V
Product Specification
September 28, 2007
------------------ (9)
SENSE
PD-PWM
is given by
SG6903
.

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