LP3971SQ-N510/NOPB National Semiconductor, LP3971SQ-N510/NOPB Datasheet - Page 43

• Manufacturer Part Number: LP3971SQ-N510/NOPB
• Description: IC PMU FOR ADV APPLICATION 40LLP
• Manufacturer: National Semiconductor
• Series: PowerWise®r

Specifications of LP3971SQ-N510/NOPB

• Applications: Processor
• Current - Supply: 60µA
• Voltage - Supply: 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 40-LLP
• For Use With: LP3971SQ-B410EV - BOARD EVALUATION LP3971SQ-B410
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: LP3971SQ-N510TR

Application Note - LP3971 Reset Sequence
INITIAL COLD START POWER ON SEQUENCE
1.
2.
3.
4.
5.
* Note that BOTH nRSTO and nBATT_FLT need to be de-asserted before SYS_EN is enabled. The sequence of the two signals is independent of each other
and can occur is either order.
The Back up battery is connected to the PMU, power is
applied to the back-up battery pin, the RTC_LDO turns
on and supplies a stable output voltage to the
V
the power-on reset event) with nRSTO asserted from the
LP3971 to the processor.
nRSTO de-asserts after a minimum of 50 mS.
The Applications processor waits for the de-assertion of
nBATT_FLT to indicate system power (V
After system power (V
asserts nBATT_FLT. Note that BOTH nRSTO and
nBATT_FLT need to be de-asserted before SYS_EN is
enabled. The sequence of the two signals is independent
of each other.
The Applications processor asserts SYS_EN, the
LP3971 enables the system high-voltage power
supplies. The Applications processor starts its
countdown timer set to 125 mS.
CC
_BATT pin of the Applications processor (initiating
IN
) is applied, the LP3971 de-
IN
) is available.
43
6.
7.
8.
9.
10. The Applications processor begins the execution of
The LP3971 enables the high-voltage power supplies.
— LDO1 power for V
Countdown timer expires; the Applications processor
asserts PWR_EN to enable the low-voltage power
supplies. The processor starts the countdown timer set
to 125 mS period.
The Applications processor asserts PWR_EN (ext. pin or
I
Countdown timer expires; If enabled power domains are
OK (I
enabling the processors 13 MHz oscillator and PLL’s.
code.
2
C), the LP3971 enables the low-voltage regulators.
and I/O Blocks), BG (Bandgap reference voltage),
OSC13M (13 MHz oscillator voltage) and PLL
enabled first, followed by others if delay is on.
2
C read) the power up sequence continues by
CC
_MVT (Power for internal logic
20180722
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