MAX16065ETM+ Maxim Integrated Products, MAX16065ETM+ Datasheet
MAX16065ETM+
Specifications of MAX16065ETM+
Related parts for MAX16065ETM+
MAX16065ETM+ Summary of contents
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... Applications Networking Equipment Telecom Equipment (Base Stations, Access) Storage/Raid Systems Servers Ordering Information PART TEMP RANGE -40NC to +85NC MAX16065ETM+ MAX16066ETL+ -40NC to +85NC +Denotes a lead(Pb)-free/RoHS-compliant package. *EP = Exposed pad. Pin Configuration and Typical Operating Circuits appear at end of data sheet. Features PIN-PACKAGE 48 TQFN-EP* ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers ABSOLUTE MAXIMUM RATINGS V , CSP, CSM to GND ........................................-0.3V to +15V CC CSP to CSM ..........................................................-0.7V to +0.7V MON_, GPIO_, SCL, SDA, A0, RESET, EN_OUT9–EN_OUT12 to GND (programmed as open-drain outputs) ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers ELECTRICAL CHARACTERISTICS (continued 2.8V to 14V -40NC to +85NC, unless otherwise specified. Typical values are (Note 1) PARAMETER SYMBOL ADC DC ACCURACY Resolution Gain ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers ELECTRICAL CHARACTERISTICS (continued 2.8V to 14V -40NC to +85NC, unless otherwise specified. Typical values are (Note 1) PARAMETER SYMBOL OUTPUTS (EN_OUT_, RESET, GPIO_) Output-Voltage ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers ELECTRICAL CHARACTERISTICS (continued 2.8V to 14V -40NC to +85NC, unless otherwise specified. Typical values are (Note 1) PARAMETER SYMBOL Output Fall Time Data Hold ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers SDA t SU:DAT t LOW SCL t HIGH t HD:STA START CONDITION Figure 1. SMBus Timing Diagram TCK TDI, TMS TDO Figure 2. JTAG ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers (Typical values are 3.3V +25°C, unless otherwise noted SUPPLY CURRENT CC vs. V SUPPLY VOLTAGE CC 6 ABP AND DBP CONNECTED ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers (Typical values are 3.3V +25°C, unless otherwise noted OUTPUT-VOLTAGE HIGH vs. SOURCE CURRENT (PUSH-PULL OUTPUT) 3.4 3.3 3.2 3.1 3.0 2.9 GPIO_ 2.8 EN_OUT_ 2.7 ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers PIN NAME MAX16065 MAX16066 40, 1–5, MON1– 1–6, 43–46 36–39 MON10 MON11, 47, 48 — MON12 7 6 CSP 8 7 CSM 9 8 RESET 10 9 TMS 11 10 TDI 12 ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers MAX16065 EN 1.4V CSP A V CSM VOLTAGE 10-BIT ADC MON1– SCALING MON12 AND MUX SMBus INTERFACE AO SCL SDA 10 _____________________________________________________________________________________ ABP DBP CSTH REF DIGITAL ADC (SAR) ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers Detailed Description The MAX16065 manages up to twelve system power supplies and the MAX16066 can manage up to eight system power supplies. After boot-up high and the software enable ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers Table 1. Current Sequencer Slot REGISTER BIT RANGE ADDRESS [4:0] 21h [7:5] Multiple Sequencing Groups The MAX16065/MAX16066 sequencing slots can be split into two groups: the primary sequence and the sec- ondary ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers of the EN comparator output or the software enable bit. If operating in latch-on fault mode, toggle EN or toggle the Software Enable bit to clear the latch condition and restart the ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers Table 4. Power-Up/Power-Down Slot Delays CODE 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111 sequence delay is then counted before moving to the next ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers SLOT 0 SLOT1-SLOT2 DELAY EN_OUT1 BOTH ARE ASSIGNED TO SLOT 1 MON4 UV/OV MONITORING BEGINS WHEN MON4 REACHES UV THRESHOLD EN_OUT2 BOTH ARE ASSIGNED TO SLOT 2 MON3 MON5 RESET EN Figure ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers Table 5. MON_ and EN_OUT_ Assignment Registers (continued) REGISTER FLASH BIT RANGE ADDRESS ADDRESS 84h 284h 85h 285h 86h 286h 87h 287h 88h 288h 89h 289h Table 6. MON_ and EN_OUT_ Slot ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers Table 7. t Delay Settings FAULT CODE 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111 When the secondary sequence group is already pow- ered ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers are MON1/MON2, MON3/MON4, MON5/MON6, MON7/ MON8, MON9/MON10, MON11/MON12 with the first input always being at a higher voltage than the second. Use differential voltage sensing to eliminate voltage off- sets or measure ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers Table 8. Overcurrent Primary Threshold and Current-Sense Control REGISTER FLASH ADDRESS ADDRESS 47h 247h 73h 273h Table 9. ADC Configuration Registers FLASH REGISTER ADDRESS ADDRESS 43h 243h ______________________________________________________________________________________ BIT RANGE 1 = ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers Table 9. ADC Configuration Registers (continued) FLASH REGISTER ADDRESS ADDRESS 44h 244h 45h 245h 20 _____________________________________________________________________________________ BIT RANGE ADC5 Full-Scale Range 5.6V [1: 2. 1.4V 11 ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers Table 9. ADC Configuration Registers (continued) FLASH REGISTER ADDRESS ADDRESS 46h 246h Table 10. ADC Conversion Results (Read Only) REGISTER ADDRESS 00h 01h 02h 03h 04h 05h 06h 07h 08h 09h 0Ah ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers When GPIO1 GPIO8 are configured as general-pur- – pose inputs/outputs, read values from the GPIO_ ports through r1Eh and write values to GPIO_s through r3Eh. Note that r3Eh has a corresponding flash ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers Table 12. GPIO_ Configuration Registers (continued) REGISTER FLASH ADDRESS ADDRESS 41h 241h 42h 242h Table 13. GPIO_ Function Configuration Bits GPIO1 GPIO2 Logic 000 Logic input input Logic 001 Logic output output ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers GPIO1, GPIO3, GPIO4, GPIO5, and GPIO7 are con- figurable to assert low during any fault condition. This includes power-up, power-down fault conditions as well as conditions where Fault1 or Fault2 assert. Table ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers Table 14. Fault1 and Fault2 Dependencies (continued) REGISTER FLASH ADDRESS ADDRESS 39h 239h 3Ah 23Ah Overcurrent Comparator (OVERC) GPIO1 to GPIO8 are configurable to assert low when the voltage across CSP and ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers External Fault (EXTFAULT) GPIO4 and GPIO8 are configurable as the external fault input/output. When configured as push-pull, EXTFAULT signals that a critical fault has occurred on one or more monitored voltages or ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers Table 15. Fault Threshold Registers REGISTER FLASH BIT RANGE ADDRESS ADDRESS 48h 248h 49h 249h 4Ah 24Ah 4Bh 24Bh 4Ch 24Ch 4Dh 24Dh 4Eh 24Eh 4Fh 24Fh 50h 250h 51h 251h 52h ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers Table 16. Deglitch Configuration REGISTER FLASH ADDRESS ADDRESS 73h 273h 74h 274h During normal operation, a fault condition can be con- figured to shut down all the EN_OUT_s and store fault information ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers Table 17. Fault Flags (continued) REGISTER BIT RANGE ADDRESS [0] [1] [2] 1Ch [3] [4] [5] [6] [4:0] 1Dh [7:5] Table 18. Critical Fault Configuration REGISTER FLASH BIT ADDRESS ADDRESS RANGE [1:0] ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers Table 18. Critical Fault Configuration (continued) REGISTER FLASH BIT ADDRESS ADDRESS RANGE [0] [1] [2] [3] 70h 270h [4] [5] [6] [7] [0] [1] [2] [3] 71h 271h [4] [5] [6] [7] ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers Table 19. Nonvolatile Fault Log Registers (continued) FLASH ADDRESS BIT RANGE [0] [1] [2] 202h [3] [4] [5] [7:6] 203h [7:0] 204h [7:0] 205h [7:0] 206h [7:0] 207h [7:0] 208h [7:0] 209h ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers Set r74h[4: value other than ‘00’ to select autoretry mode (see Table 20). In this configuration, the device shuts down after a critical fault event then restarts following a configurable ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers Table 21. EN_OUT1–EN_OUT12 Configuration (continued) REGISTER ADDRESS FLASH ADDRESS 31h 231h 32h (MAX16065 Only) 232h ______________________________________________________________________________________ BIT RANGE DESCRIPTION EN_OUT5 Configuration Active-low, open drain [1: Active-high, open drain ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers Table 21. EN_OUT1–EN_OUT12 Configuration (continued) REGISTER ADDRESS FLASH ADDRESS 33h EN_OUT_s as GPIO_ (MAX16065 Only) EN_OUT9 to EN_OUT12 can be configured as GPIO_ by setting the sequencing slot assignments in r88h and ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers Table 22. EN_OUT_ GPIO_ State Registers REGISTER FLASH ADDRESS ADDRESS 1Fh — 34h 234h MAX16065 fig06 20ms/div Figure 6. RESET and EN_OUT_ During Power-Up, EN_OUT_ in Open-Drain Active-Low Configuration The watchdog timer ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers Table 23. Reset Output Configuration REGISTER FLASH BIT RANGE ADDRESS ADDRESS 3Bh 23Bh 3Ch 23Ch 3Dh 23Dh 36 _____________________________________________________________________________________ Reset Output Depends On Undervoltage threshold violations [1: Early ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers The normal watchdog timeout period, t the first transition on WDI before the conclusion of the long startup watchdog period, t WDI_STARTUP During the normal operating mode, WDO asserts if the FP ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers V CC < t WDI WDI RESET WDO 0V Figure 10. Watchdog Startup Sequence with Watchdog Reset Output Enable Bit Set to ‘1’ Table 24. Watchdog ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers Table 25. Memory Lock Bits REGISTER FLASH ADDRESS ADDRESS 8Ch 28Ch Independent Watchdog Timer Operation When r73h[4] is ‘1’ the watchdog timer operates in inde- pendent mode. In independent mode, the watchdog ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers SDA SCL DATA LINE STABLE, CHANGE OF DATA VALID DATA ALLOWED Figure 11. Bit Transfer over the bus is 8 bits long and is always followed by an acknowledge pulse. SCL is ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers Table 26. SMBus Settings Register REGISTER FLASH ADDRESS ADDRESS 8Bh 28Bh Table 27. Setting the SMBus Slave Address SCL SDA R = Read/Write select bit. Table 28. Command codes ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers Restrictions When Writing to Flash Flash must be written to 8 bytes at a time. The initial address must be aligned to 8-byte boundaries—the 3 LSBs of the initial address must be ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers page is currently selected. The write byte procedure is the following: 1) The master sends a START condition. 2) The master sends the 7-bit slave address and a write bit (low). 3) ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers The block write procedure is the following: 1) The master sends a START condition. 2) The master sends the 7-bit slave address and a write bit (low). 3) The addressed slave asserts ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers The MAX16065/MAX16066 support the SMBus alert protocol. To enable the SMBus alert output, set r35h[1:0] according to Table 29, which configures a Fault1, Fault2, or ANY_FAULT output to act as the SMBus ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers Send Byte Format S ADDRESS R/W ACK COMMAND ACK 7 bits bits 0 Slave Address: Address Data Byte: Presets the internal of the slave on the serial address pointer ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers TDI TMS TCK Figure 15. JTAG Block Diagram Pause-DR: Shifting of the test data registers halts while in this state. All test data registers retain their previous state. ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers exit1-IR state. If TMS is low on the rising edge of TCK, the controller enters the shift-IR state. Shift-IR: In this state, the shift register in the instruction register connects between TDI ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers TEST-LOGIC-RESET RUN-TEST/IDLE 0 Figure 16. Tap Controller State Diagram Table 30. JTAG Instruction Set INSTRUCTION CODE BYPASS 0x1F IDCODE 0x00 USERCODE 0x03 LOAD ADDRESS 0x04 READ DATA 0x05 WRITE ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers Table 32. 32-Bit User-Code Data MSB Don’t Care SMBus slave ID 00000000000000000 See Table 27 SAVE: This is an extension to the standard IEEE 1149.1 instruction set that triggers a fault log. ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers Table 33. Maximum Write Time r6Dh[1:0] DESCRIPTION VALUE Save flags and ADC 00 readings 01 Save flags 10 Save ADC readings 11 Do not save anything MAX16065 ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers Figure 19. Graphical User Interface Screenshot slot on different devices will not come up in the desired order even if the sequence delays are identical. U Consider using an external FP to ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers This way a single pair of inputs can monitor the voltage and the current of a power-supply rail. The overvoltage threshold on the even-numbered MON_ inputs can be used as an overcurrent ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers FLASH REGISTER READ/ ADDRESS ADDRESS WRITE ADC VALUES, FAULT REGISTERS, GPIO_s AS INPUT PORTS—NOT IN FLASH — 000 — 001 — 002 — 003 — 004 — 005 — 006 — 007 ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers FLASH REGISTER READ/ ADDRESS ADDRESS WRITE GPIO AND OUTPUT DEPENDENCIES/CONFIGURATIONS 230 030 R/W 231 031 R/W 232 032 R/W 233 033 R/W 234 034 R/W 235 035 R/W 236 036 R/W 237 ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers FLASH REGISTER READ/ ADDRESS ADDRESS WRITE 254 054 255 055 256 056 257 057 258 058 259 059 25A 05A 25B 05B 25C 05C 25D 05D 25E 05E 25F 05F 260 060 ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers FLASH REGISTER READ/ ADDRESS ADDRESS WRITE 278 078 R/W 279 079 R/W 27A 07A R/W 27B 07B R/W 27C 07C R/W 27D 07D R/W MISCELLANEOUS 27E 07E R/W 27F 07F R/W 280 ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers USER FLASH 300 39F 3A0 3AF 3B0 3FF V SUPPLY OUT IN DC-DC GND IN OUT DC-DC GND OUT IN DC-DC GND 58 _____________________________________________________________________________________ R/W User flash — Reserved R/W User flash ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers V SUPPLY IN OUT DC-DC GND OUT IN DC-DC GND IN OUT DC-DC GND NOTE: MON = MON1, MON3, MON5, MON7, MON9, MON11 ODD MON = MON2, MON4, MON6, MON8, MON10, MON12 ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers TOP VIEW EN_OUT1 TOP VIEW 60 _____________________________________________________________________________________ DBP ABP 41 GND 42 MAX16065 ...
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Flash-Configurable System Managers with Nonvolatile Fault Registers Chip Information PROCESS: BiCMOS ______________________________________________________________________________________ Package Information For the latest package outline information and land patterns www.maxim-ic.com/packages. PACKAGE PACKAGE OUTLINE TYPE CODE NO. 48 TQFN-EP T4877+6 21-0144 40 TQFN-EP T4066+5 ...
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... Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 62 Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 2009 Maxim Integrated Products © ...