MCP9801-M/MS Microchip Technology, MCP9801-M/MS Datasheet - Page 11

IC SENSOR THERMAL 2.7V 8MSOP

MCP9801-M/MS

Manufacturer Part Number
MCP9801-M/MS
Description
IC SENSOR THERMAL 2.7V 8MSOP
Manufacturer
Microchip Technology

Specifications of MCP9801-M/MS

Package / Case
8-MSOP, Micro8™, 8-uMAX, 8-uSOP,
Output Type
I²C™/SMBus™
Function
Temp Monitoring System (Sensor)
Topology
ADC (Sigma Delta), Register Bank
Sensor Type
Internal
Sensing Temperature
-55°C ~ 125°C
Output Alarm
No
Output Fan
Yes
Voltage - Supply
2.7 V ~ 5.5 V
Operating Temperature
-55°C ~ 125°C
Mounting Type
Surface Mount
Temperature Threshold
Programmable
Full Temp Accuracy
3 C
Digital Output - Bus Interface
I2C, SMBus
Digital Output - Number Of Bits
9 bit to 12 bit
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2.7 V
Description/function
High Accuracy 12-bit Serial Input/Output, Thermal Monitors
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 55 C
Supply Current
400 uA
Ic Output Type
Voltage
Sensing Accuracy Range
± 0.5°C
Temperature Sensing Range
-55°C To +125°C
Supply Voltage Range
2.7V To 5.5V
Resolution (bits)
12bit
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

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4.0
4.1
The MCP9800/1/2/3 serial clock input (SCL) and the
bidirectional serial data line (SDA) form a 2-wire
bidirectional SMBus/Standard mode I
communication port (refer to the
Pin Characteristics Table
Timing Specifications
The following bus protocol has been defined:
TABLE 4-1:
 2010 Microchip Technology Inc.
Master
Slave
Transmitter Device sending data to the bus.
Receiver
Start
Stop
Read/Write A read or write to the MCP9800/1/2/3
ACK
NAK
Busy
Not Busy
Data Valid
Term
SERIAL COMMUNICATION
2-Wire SMBus/Standard Mode
I
Interface
2
C™ Protocol-Compatible
The device that controls the serial bus,
typically a microcontroller.
The device addressed by the master,
such as the MCP9800/1/2/3.
Device receiving data from the bus.
A unique signal from master to initiate
serial interface with a slave.
A unique signal from the master to
terminate serial interface from a slave.
registers.
A receiver Acknowledges (ACK) the
reception of each byte by polling the
bus.
A receiver Not-Acknowledges (NAK) or
releases the bus to show End-of-Data
(EOD).
Communication is not possible
because the bus is in use.
The bus is in the Idle state, both SDA
and SCL remain high.
SDA must remain stable before SCL
becomes high in order for a data bit to
be considered valid. During normal
data transfers, SDA only changes state
while SCL is low.
MCP9800 SERIAL BUS
PROTOCOL DESCRIPTIONS
Table).
Description
and
Digital Input/Output
Serial Interface
2
C compatible
4.1.1
Data transfers are initiated by a Start condition (Start),
followed by a 7-bit device address and a read/write bit.
An Acknowledge (ACK) from the slave confirms the
reception of each byte. Each access must be
terminated by a Stop condition (Stop).
Repeated communication is initiated after t
This device does not support sequential register read/
write. Each register needs to be addressed using the
Register Pointer.
This device supports the Receive Protocol. The
register can be specified using the pointer for the initial
read. Each repeated read or receive begins with a Start
condition and address byte. The MCP9800/1/2/3
retains the previously selected register. Therefore, it
outputs data from the previously-specified register
(repeated pointer specification is not necessary).
4.1.2
The bus is controlled by a master device (typically a
microcontroller) that controls the bus access and
generates the Start and Stop conditions. The
MCP9800/1/2/3 is a slave device and does not control
other devices in the bus. Both master and slave
devices can operate as either transmitter or receiver.
However, the master device determines which mode is
activated.
4.1.3
A high-to-low transition of the SDA line (while SCL is
high) is the Start condition. All data transfers must be
preceded by a Start condition from the master. If a Start
condition is generated during data transfer, the
MCP9800/1/2/3 resets and accepts the new Start
condition.
A low-to-high transition of the SDA line (while SCL is
high) signifies a Stop condition. If a Stop condition is
introduced during data transmission, the MCP9800/1/
2/3 releases the bus. All data transfers are ended by a
Stop condition from the master.
4.1.4
Following the Start condition, the host must transmit an
8-bit address byte to the MCP9800/1/2/3. The address
for
‘1001,A2,A1,A0’ in binary, where the A2, A1 and A0
bits are set externally by connecting the corresponding
pins to V
transmitted in the serial bit stream must match the
selected address for the MCP9800/1/2/3 to respond
with an ACK. Bit 8 in the address byte is a read/write
bit. Setting this bit to ‘1’ commands a read operation,
while ‘0’ commands a write operation (see
the
DD
DATA TRANSFER
MASTER/SLAVE
START/STOP CONDITION
ADDRESS BYTE
MCP9800
‘1’ or GND ‘0’. The 7-bit address
MCP9800/1/2/3
Temperature
DS21909D-page 11
Sensor
Figure
B-FREE
.
4-1).
is

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