VRE3050AS Cirrus Logic Inc, VRE3050AS Datasheet - Page 5

IC VOLT REF PREC 5V 8-SMD

VRE3050AS

Manufacturer Part Number
VRE3050AS
Description
IC VOLT REF PREC 5V 8-SMD
Manufacturer
Cirrus Logic Inc
Datasheet

Specifications of VRE3050AS

Reference Type
Series
Voltage - Output
5V
Tolerance
±0.5mV
Temperature Coefficient
0.6ppm/°C
Voltage - Input
8 ~ 36 V
Number Of Channels
1
Current - Quiescent
4mA
Current - Output
15mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
8-SMD
Product
Voltage References
Topology
Series References
Output Voltage
5 V
Average Temperature Coefficient (typ)
0.6 PPM / C
Series Vref - Input Voltage (max)
40 V
Shunt Current (max)
15 mA
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Cathode
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
598-1774
3. THEORY OF OPERATION
The following discussion refers to the block diagram in Figure 1. A FET current source is used to bias a 6.3 V zener
diode. The zener voltage is divided by the resistor network R1 and R2. This voltage is then applied to the noninvert-
ing input of the operational amplifier which amplifies the voltage to produce a 5 V output. The gain is determined by
the resistor networks R3 and R4: G=1 + R4/R3. The 6.3 V zener diode is used because it is the most stable diode
over time and temperature.
The current source provides a closely regulated zener current, which determines the slope of the references’ volt-
age vs. temperature function. By trimming the zener current a lower drift over temperature can be achieved. But
since the voltage vs. temperature function is nonlinear this compensation technique is not well suited for wide tem-
perature ranges.
A nonlinear compensation network of thermistors and resistors that is used in the VRE series voltage references.
This proprietary network eliminates most of the nonlinearity in the voltage vs. temperature function. By adjusting the
slope, a very stable voltage is produced over wide temperature ranges.
This network is less than 2% of the overall network resistance so it has a negligible effect on long term stability. The
proper connection of the VRE3050 series voltage references with the optional trim resistor for initial error and the
optional capacitor for noise reduction is shown below.
EXTERNAL CONNECTIONS
PIN DESCRIPTION
4. BASIC CIRCUIT CONNECTION
To achieve the specified performance, pay careful attention to the layout. A low resistance star configuration will
reduce voltage errors, noise pickup, and noise coupled from the power supply. Commons should be connected to
a single point to minimize interconnect resistances.
VRE3050DS
Optional Noise
1, 3, 7
Reduction
2
4
5
6
8
Capacitor
C
N
1µF
N. C.
V
GND
TRIM
OUT
NR
IN
®
P r o d u c t I n n o v a t i o n F r o m
8
Internally connected. Do not use
Positive power supply input
Ground
External trim input. Leave open if not
used.
Voltage reference output
Noise Reduction
VRE3050
+ V
2
4
IN
6
5
10kΩ
Optional Fine
Trim Adjustment
+ V
OUT
VRE3050
5

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