DS3163 Maxim Integrated Products, DS3163 Datasheet - Page 6
DS3163
Manufacturer Part Number
DS3163
Description
IC TRPL ATM/PACKET PHY 400-PBGA
Manufacturer
Maxim Integrated Products
Datasheet
1.DS3163.pdf
(384 pages)
Specifications of DS3163
Applications
*
Mounting Type
Surface Mount
Package / Case
400-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
- Current page: 6 of 384
- Download datasheet (4Mb)
11
12
12.1 R
12.2 G
12.3 UTOPIA/POS-PHY S
12.4 P
12.5 BERT......................................................................................................................................................... 236
12.6 B3ZS/HDB3 L
12.7 HDLC......................................................................................................................................................... 250
12.8 FEAC C
12.9 T
12.10 DS3/E3 F
12.11 F
12.12 DS3/E3 PLCP ........................................................................................................................................... 305
12.13 FIFO R
10.15.2 Features ............................................................................................................................................. 190
10.15.3 Configuration and Monitoring............................................................................................................. 190
10.15.4 Receive Pattern Detection ................................................................................................................. 191
10.15.5 Transmit Pattern Generation.............................................................................................................. 193
OVERALL REGISTER MAP
REGISTER MAPS AND DESCRIPTIONS
12.1.1 Global Register Bit Map ..................................................................................................................... 197
12.1.2 HDLC Register Bit Map...................................................................................................................... 200
12.1.3 T3 Register Bit Map ........................................................................................................................... 202
12.1.4 E3 G.751 Register Bit Map ................................................................................................................ 203
12.1.5 E3 G.832 Register Bit Map ................................................................................................................ 204
12.1.6 Clear-Channel Register Bit Map ........................................................................................................ 205
12.1.7 Fractional Register Bit Map................................................................................................................ 205
12.1.8 Transmit Cell Processor Bit Map ....................................................................................................... 208
12.1.9 Transmit Packet Processor Bit Map................................................................................................... 208
12.2.1 Register Bit Descriptions.................................................................................................................... 212
12.3.1 Transmit System Interface ................................................................................................................. 220
12.3.2 Receive System Interface Register Map............................................................................................ 221
12.4.1 Register Bit Descriptions.................................................................................................................... 224
12.5.1 BERT Register Map ........................................................................................................................... 236
12.5.2 BERT Register Bit Descriptions ......................................................................................................... 237
12.6.1 Transmit Side Line Encoder/Decoder Register Map ......................................................................... 245
12.6.2 Receive Side Line Encoder/Decoder Register Map .......................................................................... 246
12.7.1 HDLC Transmit Side Register Map.................................................................................................... 250
12.7.2 HDLC Receive Side Register Map..................................................................................................... 254
12.8.1 FEAC Transmit Side Register Map.................................................................................................... 258
12.8.2 FEAC Receive Side Register Map..................................................................................................... 261
12.9.1 Trail Trace Transmit Side................................................................................................................... 264
12.9.2 Trail Trace Receive Side Register Map ............................................................................................. 266
12.10.1 Transmit DS3 ..................................................................................................................................... 270
12.10.2 Receive DS3 Register Map................................................................................................................ 272
12.10.3 Transmit G.751 E3 ............................................................................................................................. 280
12.10.4 Receive G.751 E3 Register Map ....................................................................................................... 282
12.10.5 Transmit G.832 E3 Register Map ...................................................................................................... 287
12.10.6 Receive G.832 E3 Register Map ....................................................................................................... 290
12.10.7 Transmit Clear Channel ..................................................................................................................... 298
12.10.8 Receive Clear Channel ...................................................................................................................... 299
12.11.1 Fractional Transmit Side Register Map.............................................................................................. 301
12.11.2 Fractional Receive Side Register Map............................................................................................... 303
12.12.1 Transmit Side PLCP........................................................................................................................... 305
12.12.2 Receive Side PLCP Register Map ..................................................................................................... 309
12.13.1 Transmit FIFO Register Map ............................................................................................................. 318
12.13.2 Receive FIFO Register Map .............................................................................................................. 322
RAIL
RACTIONAL
ER
EGISTERS
LOBAL
P
T
ORT
RACE
EGISTERS
R
ONTROLLER
EGISTERS
RAMER
C
B
OMMON
DS3/E3 .................................................................................................................................. 301
............................................................................................................................................... 264
IT
INE
M
APS
........................................................................................................................................ 270
........................................................................................................................................ 318
E
.................................................................................................................................... 211
.................................................................................................................................... 224
NCODER
................................................................................................................................... 258
.................................................................................................................................. 197
YSTEM
/D
I
NTERFACE
ECODER
....................................................................................................... 245
..................................................................................................... 220
194
197
Related parts for DS3163
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
Part Number:
Description:
MAX7528KCWPMaxim Integrated Products [CMOS Dual 8-Bit Buffered Multiplying DACs]
Manufacturer:
Maxim Integrated Products
Datasheet:
Part Number:
Description:
Single +5V, fully integrated, 1.25Gbps laser diode driver.
Manufacturer:
Maxim Integrated Products
Datasheet:
Part Number:
Description:
Single +5V, fully integrated, 155Mbps laser diode driver.
Manufacturer:
Maxim Integrated Products
Datasheet:
Part Number:
Description:
VRD11/VRD10, K8 Rev F 2/3/4-Phase PWM Controllers with Integrated Dual MOSFET Drivers
Manufacturer:
Maxim Integrated Products
Datasheet:
Part Number:
Description:
Highly Integrated Level 2 SMBus Battery Chargers
Manufacturer:
Maxim Integrated Products
Datasheet:
Part Number:
Description:
Current Monitor and Accumulator with Integrated Sense Resistor; ; Temperature Range: -40°C to +85°C
Manufacturer:
Maxim Integrated Products
Part Number:
Description:
TSSOP 14/A°/RS-485 Transceivers with Integrated 100O/120O Termination Resis
Manufacturer:
Maxim Integrated Products
Part Number:
Description:
TSSOP 14/A°/RS-485 Transceivers with Integrated 100O/120O Termination Resis
Manufacturer:
Maxim Integrated Products
Part Number:
Description:
QFN 16/A°/AC-DC and DC-DC Peak-Current-Mode Converters with Integrated Step
Manufacturer:
Maxim Integrated Products
Part Number:
Description:
TDFN/A/65V, 1A, 600KHZ, SYNCHRONOUS STEP-DOWN REGULATOR WITH INTEGRATED SWI
Manufacturer:
Maxim Integrated Products
Part Number:
Description:
Integrated Temperature Controller f
Manufacturer:
Maxim Integrated Products
Part Number:
Description:
SOT23-6/I°/45MHz to 650MHz, Integrated IF VCOs with Differential Output
Manufacturer:
Maxim Integrated Products
Part Number:
Description:
SOT23-6/I°/45MHz to 650MHz, Integrated IF VCOs with Differential Output
Manufacturer:
Maxim Integrated Products
Part Number:
Description:
EVALUATION KIT/2.4GHZ TO 2.5GHZ 802.11G/B RF TRANSCEIVER WITH INTEGRATED PA
Manufacturer:
Maxim Integrated Products
Part Number:
Description:
QFN/E/DUAL PCIE/SATA HIGH SPEED SWITCH WITH INTEGRATED BIAS RESISTOR
Manufacturer:
Maxim Integrated Products
Datasheet: