DS3163 Maxim Integrated Products, DS3163 Datasheet - Page 72
DS3163
Manufacturer Part Number
DS3163
Description
IC TRPL ATM/PACKET PHY 400-PBGA
Manufacturer
Maxim Integrated Products
Datasheet
1.DS3163.pdf
(384 pages)
Specifications of DS3163
Applications
*
Mounting Type
Surface Mount
Package / Case
400-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Figure 8-26
the ATM device places address ‘00h’ on the address bus (which is mapped to Port 1). PHY device '1' (Port 1)
indicates to the ATM device that it has a complete cell to send by asserting RDXA[1]. On clock edge 4, the ATM
device selects PHY device '1'. On clock edge 5, the ATM device asserts REN. On clock edge 6, the PHY device ‘1’
starts a cell transfer to the ATM device by placing the first byte of cell data on RDATA, and asserting RSOX to
indicate the transfer of the first byte of the cell. On clock edge 7, the PHY device de-asserts RSOX as it continues
to place additional bytes of the cell on RDATA. On clock edge 13, PHY device ‘2’ asserts RDXA[2] to indicate to
the ATM device that it is ready to send a cell. On clock edge 15, PHY device '1’ indicates that it cannot transfer a
complete cell by de-asserting RDXA[1]. On clock edge 16, the ATM device deselects PHY device '1' and selects
PHY device '2' by de-asserting REN and placing PHY device '2's address on RADR. On clock edge 17, the ATM
device asserts REN. On clock edge 18, PHY device ‘2’ (Port 2) starts the transfer of a cell to the ATM device by
placing the first byte of cell data on RDATA, and asserting RSOX to indicate the transfer of the first byte of the cell.
On clock edge 18, the PHY device de-asserts RSOX as it continues to place additional bytes of the cell on RDATA.
Figure 8-26. UTOPIA Level 2 Receive Cell Transfer Direct Mode
RDXA[2]
RDXA[1]
RDXA[3]
RDXA[4]
RDATA
RSCLK
Cell From:
RADR
Transfer
RSOX
REN
shows a multi-device transmit interface multiple cell transfer to different PHY devices. On clock edge 2,
1
2
3
4
5
6
H1
7
H2
…
8
00h
H3
9
10
P42
11
PORT 1
P43
12
P44
13
P45
14
P46
15
P47
16
P48
17
01h
18
H1
PORT 2
19
H2
20
H3
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