Z8F64220100ZDA Zilog, Z8F64220100ZDA Datasheet - Page 220
Manufacturer Part Number
ADAPTER ICE Z8 ENCORE 64K 64LQFP
Specifications of Z8F64220100ZDA
For Use With/related Products
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Table 103. OCD Status Register (OCDSTAT)
OCD Status Register
0 = BRK instruction sets DBGMODE to 1.
1 = eZ8 CPU loops on BRK instruction.
These bits are reserved and must be 0.
Setting this bit to 1 resets the Z8 Encore! XP
through a normal Power-On Reset sequence with the exception that the On-Chip Debug-
ger is not reset. This bit is automatically cleared to 0 when the reset finishes.
0 = No effect
1 = Reset the Z8 Encore! XP
The OCD Status register
the debugger and the system.
This bit is set if the part is in DEBUG mode (DBGMODE is 1), or if a BRK instruction
occurred since the last time OCDCTL was written. This can be used to determine if the
CPU is running or if it is idling.
0 = The eZ8 CPU is running.
1 = The eZ8 CPU is either stopped or looping on a BRK instruction.
0 = The device is not in HALT mode.
1 = The device is in HALT mode.
RPEN—Read Protect Option Bit Enabled
0 = The Read Protect Option Bit is disabled (1).
1 = The Read Protect Option Bit is enabled (0), disabling many OCD commands.
These bits are always 0.
F64XX Series device
103) reports status information about the current state of
F64XX Series devices. The devices go
Z8 Encore! XP