C8051T610DB32 Silicon Laboratories Inc, C8051T610DB32 Datasheet - Page 190

DAUGHT BOARD T610 32TQFP SOCKET

C8051T610DB32

Manufacturer Part Number
C8051T610DB32
Description
DAUGHT BOARD T610 32TQFP SOCKET
Manufacturer
Silicon Laboratories Inc
Datasheet

Specifications of C8051T610DB32

Module/board Type
Socket Module - TQFP
Processor To Be Evaluated
C8051T61x
Interface Type
USB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
C8051T610DK
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
336-1505
C8051T610/1/2/3/4/5/6/7
26. Programmable Counter Array
The Programmable Counter Array (PCA0) provides enhanced timer functionality while requiring less CPU
intervention than the standard 8051 counter/timers. The PCA consists of a dedicated 16-bit counter/timer
and five 16-bit capture/compare modules. Each capture/compare module has its own associated I/O line
(CEXn) which is routed through the Crossbar to Port I/O when enabled. The counter/timer is driven by a
programmable timebase that can select between six sources: system clock, system clock divided by four,
system clock divided by twelve, the external oscillator clock source divided by 8, Timer 0 overflows, or an
external clock signal on the ECI input pin. Each capture/compare module may be configured to operate
independently in one of six modes: Edge-Triggered Capture, Software Timer, High-Speed Output, Fre-
quency Output, 8-Bit PWM, or 16-Bit PWM (each mode is described in Section “26.3. Capture/Compare
Modules” on page 193). The external oscillator clock option is ideal for real-time clock (RTC) functionality,
allowing the PCA to be clocked by a precision external oscillator while the internal oscillator drives the sys-
tem clock. The PCA is configured and controlled through the system controller's Special Function Regis-
ters. The PCA block diagram is shown in Figure 26.1
Important Note: The PCA Module 4 may be used as a watchdog timer (WDT), and is enabled in this mode
following a system reset. Access to certain PCA registers is restricted while WDT mode is enabled.
See Section 26.4 for details.
190
Capture/Compare
Module 0
SYSCLK/12
SYSCLK/4
Timer 0 Overflow
SYSCLK
External Clock/8
ECI
Capture/Compare
Figure 26.1. PCA Block Diagram
Module 1
CLOCK
MUX
PCA
16-Bit Counter/Timer
Crossbar
Port I/O
Rev 1.0
Capture/Compare
Module 2
Capture/Compare
Module 3
Capture/Compare
Module 4 / WDT

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