C8051T610DB24 Silicon Laboratories Inc, C8051T610DB24 Datasheet - Page 196

DAUGHTER BOARD T610 24QFN SOCKET

C8051T610DB24

Manufacturer Part Number
C8051T610DB24
Description
DAUGHTER BOARD T610 24QFN SOCKET
Manufacturer
Silicon Laboratories Inc
Datasheet

Specifications of C8051T610DB24

Module/board Type
Socket Module - QFN
Processor To Be Evaluated
C8051T61x
Interface Type
USB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
C8051T610DK
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
336-1507
C8051T610/1/2/3/4/5/6/7
26.3.3. High-Speed Output Mode
In High-Speed Output mode, a module’s associated CEXn pin is toggled each time a match occurs
between the PCA Counter and the module's 16-bit capture/compare register (PCA0CPHn and
PCA0CPLn). When a match occurs, the Capture/Compare Flag (CCFn) in PCA0CN is set to logic 1. An
interrupt request is generated if the CCFn interrupt for that module is enabled. The CCFn bit is not auto-
matically cleared by hardware when the CPU vectors to the interrupt service routine, and must be cleared
by software. Setting the TOGn, MATn, and ECOMn bits in the PCA0CPMn register enables the High-
Speed Output mode. If ECOMn is cleared, the associated pin will retain its state, and not toggle on the next
match event.
Important Note About Capture/Compare Registers: When writing a 16-bit value to the PCA0 Cap-
ture/Compare registers, the low byte should always be written first. Writing to PCA0CPLn clears the
ECOMn bit to 0; writing to PCA0CPHn sets ECOMn to 1.
196
PCA0CPLn
Write to
Reset
PCA0CPHn
Write to
0
ENB
ENB
Figure 26.6. PCA High-Speed Output Mode Diagram
1
PCA
Timebase
Enable
P
W
M
1
6
n
x
C
O
M
E
n
PCA0CPLn
PCA0CPMn
C
A
P
P
n
0 0
PCA0L
C
N
A
P
n
16-bit Comparator
M
A
T
n
O
G
T
n
W
M
P
n
0 x
E
C
C
F
n
PCA0CPHn
PCA0H
Rev 1.0
Match
Toggle
C
TOGn
F
0
1
C
R
PCA0CN
0
1
C
C
F
4
CEXn
C
C
F
3
C
C
F
2
C
C
F
1
PCA Interrupt
C
C
F
0
Crossbar
Port I/O

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