C8051T600SDB Silicon Laboratories Inc, C8051T600SDB Datasheet - Page 156

BOARD SOCKET DAUGHTER SOIC

C8051T600SDB

Manufacturer Part Number
C8051T600SDB
Description
BOARD SOCKET DAUGHTER SOIC
Manufacturer
Silicon Laboratories Inc
Datasheet

Specifications of C8051T600SDB

Module/board Type
Socket Module - SOIC
Data Bus Width
8 bit
Operating Supply Voltage
+ 1.8 V to + 3.6 V
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
C8051T600DK
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1405
C8051T600/1/2/3/4/5/6
25.2.2. 8-bit Timers with Auto-Reload
When T2SPLIT is set, Timer 2 operates as two 8-bit timers (TMR2H and TMR2L). Both 8-bit timers oper-
ate in auto-reload mode as shown in Figure 25.5. TMR2RLL holds the reload value for TMR2L; TMR2RLH
holds the reload value for TMR2H. The TR2 bit in TMR2CN handles the run control for TMR2H. TMR2L is
always running when configured for 8-bit Mode.
Each 8-bit timer may be configured to use SYSCLK, SYSCLK divided by 12, or the external oscillator clock
source divided by 8. The Timer 2 Clock Select bits (T2MH and T2ML in CKCON) select either SYSCLK or
the clock defined by the Timer 2 External Clock Select bit (T2XCLK in TMR2CN), as follows:
The TF2H bit is set when TMR2H overflows from 0xFF to 0x00; the TF2L bit is set when TMR2L overflows
from 0xFF to 0x00. When Timer 2 interrupts are enabled, an interrupt is generated each time TMR2H over-
flows. If Timer 2 interrupts are enabled and TF2LEN (TMR2CN.5) is set, an interrupt is generated each
time either TMR2L or TMR2H overflows. When TF2LEN is enabled, software must check the TF2H and
TF2L flags to determine the source of the Timer 2 interrupt. The TF2H and TF2L interrupt flags are not
cleared by hardware and must be manually cleared by software.
156
External Clock / 8
T2MH
SYSCLK / 12
0
0
1
T2XCLK
T2XCLK
X
0
1
0
1
Figure 25.5. Timer 2 8-Bit Mode Block Diagram
TMR2H Clock Source
SYSCLK / 12
External Clock / 8
SYSCLK
SYSCLK
0
1
1
0
T2MH
T2ML
TR2
Rev. 1.2
TCLK
TCLK
TMR2RLH
TMR2RLL
TMR2H
TMR2L
T2ML
0
0
1
Reload
Reload
T2XCLK
X
0
1
To SMBus
To ADC,
T2SPLIT
T2XCLK
SMBus
TF2LEN
TF2H
TF2L
TR2
TMR2L Clock Source
SYSCLK / 12
External Clock / 8
SYSCLK
Interrupt

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