C8051T600SDB Silicon Laboratories Inc, C8051T600SDB Datasheet - Page 61

• Manufacturer Part Number: C8051T600SDB
• Description: BOARD SOCKET DAUGHTER SOIC
• Manufacturer: Silicon Laboratories Inc

Specifications of C8051T600SDB

• Module/board Type: Socket Module - SOIC
• Data Bus Width: 8 bit
• Operating Supply Voltage: + 1.8 V to + 3.6 V
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: C8051T600DK
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1405

Note that false rising edges and falling edges can be detected when the comparator is first powered on or
if changes are made to the hysteresis or response time control bits. Therefore, it is recommended that the
rising-edge and falling-edge flags be explicitly cleared to logic 0 a short time after the comparator is
enabled or its mode bits have been changed.
SFR Definition 13.1. CPT0CN: Comparator0 Control
SFR Address = 0xF8; Bit-Addressable
Name
Reset
Bit
3:2 CP0HYP[1:0] Comparator0 Positive Hysteresis Control Bits.
1:0 CP0HYN[1:0] Comparator0 Negative Hysteresis Control Bits.
Type
7
6
5
4
Bit
CP0OUT
CP0RIF
CP0FIF
CP0EN
Name
CP0EN
R/W
7
0
Comparator0 Enable Bit.
0: Comparator0 Disabled.
1: Comparator0 Enabled.
Comparator0 Output State Flag.
0: Voltage on CP0+ < CP0–.
1: Voltage on CP0+ > CP0–.
Comparator0 Rising-Edge Flag. Must be cleared by software.
0: No Comparator0 Rising Edge has occurred since this flag was last cleared.
1: Comparator0 Rising Edge has occurred.
Comparator0 Falling-Edge Flag. Must be cleared by software.
0: No Comparator0 Falling-Edge has occurred since this flag was last cleared.
1: Comparator0 Falling-Edge has occurred.
00: Positive Hysteresis Disabled.
01: Positive Hysteresis = 5 mV.
10: Positive Hysteresis = 10 mV.
11: Positive Hysteresis = 20 mV.
00: Negative Hysteresis Disabled.
01: Negative Hysteresis = 5 mV.
10: Negative Hysteresis = 10 mV.
11: Negative Hysteresis = 20 mV.
CP0OUT
R
6
0
CP0RIF
R/W
5
0
CP0FIF
R/W
Rev. 1.2
4
0
Function
C8051T600/1/2/3/4/5/6
3
CP0HYP[1:0]
0
R/W
2
0
1
CP0HYN[1:0]
0
R/W
0
0
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