LFDAS12XSIT Freescale Semiconductor, LFDAS12XSIT Datasheet - Page 147
LFDAS12XSIT
Manufacturer Part Number
LFDAS12XSIT
Description
HARDWARE MC9S12XS 112-PIN
Manufacturer
Freescale Semiconductor
Datasheet
1.LFDAS12XSCT.pdf
(738 pages)
Specifications of LFDAS12XSIT
Module/board Type
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
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Memory Mapping Control (S12XMMCV4)
3.4.3
Chip Bus Control
The MMC controls the address buses and the data buses that interface the S12X masters (CPU, BDM )
with the rest of the system (master buses). In addition the MMC handles all CPU read data bus swapping
operations. All internal resources are connected to specific target buses (see
Figure
3-20).
BDM
CPU
S12X1
S12X0
MMC
Address Decoder & Priority
DBG
Target Bus Controller
XBUS0
Data FLASH
PGMFLASH
RAM
Peripherals
Figure 3-20. MMC Block Diagram
S12XS Family Reference Manual, Rev. 1.11
Freescale Semiconductor
147
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