LFDAS12XSIT Freescale Semiconductor, LFDAS12XSIT Datasheet - Page 263
LFDAS12XSIT
Manufacturer Part Number
LFDAS12XSIT
Description
HARDWARE MC9S12XS 112-PIN
Manufacturer
Freescale Semiconductor
Datasheet
1.LFDAS12XSCT.pdf
(738 pages)
Specifications of LFDAS12XSIT
Module/board Type
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
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S12XECRG performs a quality check on the incoming clock signal. As soon as clock quality check indicates
a valid Oscillator Clock signal the reset sequence starts using the Oscillator clock. If after 50 check windows
the clock quality check indicated a non-valid Oscillator Clock the reset sequence starts using Self-Clock
Mode.
Figure 8-22
when the RESET pin is held low.
8.6
The interrupts/reset vectors requested by the S12XECRG are listed in
specification for related vector addresses and priorities.
Freescale Semiconductor
Interrupts
and
Figure 8-23
Internal RESET
RESET
Internal POR
RESET
Internal POR
Internal RESET
Figure 8-22. RESET Pin Tied to V
Interrupt Source
Real time interrupt
show the power-up sequence for cases when the RESET pin is tied to V
LOCK interrupt
SCM interrupt
Figure 8-23. RESET Pin Held Low Externally
Table 8-18. S12XECRG Interrupt Vectors
S12XS Family Reference Manual Rev. 1.11
Mask
Clock Quality Check
(no Self-Clock Mode)
Clock Quality Check
(no Self Clock Mode)
CCR
I bit
I bit
I bit
128 SYSCLK
) (
) (
) (
128 SYSCLK
) (
) (
) (
64 SYSCLK
DD
64 SYSCLK
(by a Pull-up Resistor)
CRGINT (LOCKIE)
CRGINT (SCMIE)
CRGINT (RTIE)
Local Enable
S12XE Clocks and Reset Generator (S12XECRGV1)
Table
8-18. Refer to MCU
DD
and
263
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