QF1DA512-DK Quickfilter Technologies LLC, QF1DA512-DK Datasheet - Page 40

• Manufacturer Part Number: QF1DA512-DK
• Description: KIT DEV FOR QF1DA512
• Manufacturer: Quickfilter Technologies LLC
• Series: SavFIRe™r

Specifications of QF1DA512-DK

• Main Purpose: Filters, Digital Filter Design
• Embedded: Yes, ASIC
• Utilized Ic / Part: QF1Da512
• Primary Attributes: 1 512 Tap FIR Filter, 12 ~ 24 Bit
• Secondary Attributes: Quickfilter Software Design Tool GUI, Works from 10 ~ 500ksps ADC Data Rates
• For Use With: WM2582 - EVALDI EARBUDS TYPE Y686-1006 - BOARD MSP-MOJO + EXPANSION HEADR
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 686-1010

16 Registers, Tables, and Figures
Control Register Listing
00h TEST_RW (User Register) ............................................................................................................................................. 20
01h CHIP_ID (Chip ID) - READ ONLY ................................................................................................................................. 20
02h VERSION (Version) - READ ONLY ............................................................................................................................... 21
03h CONTROL (Filter/Pass Through Control) ...................................................................................................................... 21
04h DCONFIG (Data Format Control) .................................................................................................................................. 22
05h FCONFIG (Filter Control) ............................................................................................................................................... 23
06h NUM_TAPS (Number of FIR Filter Taps, Lower Bits) ................................................................................................... 23
07h NUM_TAPS (Number of FIR Filter Taps, Upper Bit) ..................................................................................................... 23
08h DECIMATE (Down-sampling Rate) ................................................................................................................................ 24
09h HD_OFFSET (Offset of Header Field) ........................................................................................................................... 24
0Ah HD_SIZE (Size of Header Field) ................................................................................................................................... 24
0Bh HD_MASK (Header Data Valid Mask) ........................................................................................................................... 24
0Ch HD_VALUE (Header Data Valid Value) ........................................................................................................................ 25
0Dh DATA_OFFSET (Offset of Data Field) .......................................................................................................................... 25
0Eh DATA_SIZE (Number of Bits in the Data Field)............................................................................................................. 25
0Fh GAIN (Digital Gain Value, Lower Bits) ........................................................................................................................... 25
10h GAIN (Digital Gain Value, Upper Bit) ............................................................................................................................. 26
11h TRESH (Compressor Threshold Value, Lower Bits) ...................................................................................................... 26
12h THRESH (Compressor Threshold Value, Upper Bit) ..................................................................................................... 26
13h MULTI (Compressor Multiplicor Value, Lower Bits) ....................................................................................................... 26
14h MULTI (Compressor Multiplicor Value, Upper Bit) ......................................................................................................... 27
15h ADDOR (Compressor Addor Value, Lower Bits) ........................................................................................................... 27
16h ADDOR (Compressor Addor Value, Upper Bit) ............................................................................................................. 27
17h – 1Eh IO_TDT, IO_RST_N, IO_DCLK, IO_DSEL, IO_DIN, IO_CS_N, IO_SCLK, IO_SDI
1Fh – 20h IO_SDO IO_DOUT (cSDO, dSDO Pin Configuration) ......................................................................................... 29
21h TEST (Chip Test Register) – RESERVED ..................................................................................................................... 29
List of Tables
Table 1
Table 2
Table 3
Table 4
Table 5
Table 6
Rev A8 January 7, 2009
(TST, RSTn, dSCK, dCS, dSDI, cCSn, cSCK, cSDI Pin Configuration) ...................................................................... 28
Pin Descriptions ...................................................................................................................................................... 9
Register and Memory Format ............................................................................................................................... 18
Control Registers .................................................................................................................................................. 19
Configuration Register Access Format ................................................................................................................. 20
FIR Coefficient Memory Access Format ............................................................................................................... 30
VQFN 16, Dimensions .......................................................................................................................................... 39
PRELIMINARY DATA SHEET
40
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QF1Da512