ATAVRSB202 Atmel, ATAVRSB202 Datasheet - Page 138
ATAVRSB202
Manufacturer Part Number
ATAVRSB202
Description
KIT BATT MGMT FOR ATMEGA32HVB
Manufacturer
Atmel
Specifications of ATAVRSB202
Main Purpose
*
Embedded
*
Utilized Ic / Part
*
Primary Attributes
*
Secondary Attributes
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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8042B–AVR–06/10
The user must disable the External Protection Input in the BPCR register before the port can be
used as a normal port.
Also during the reset sequence, the External Protection Input may disable the FETs. Conse-
quently, if the External Protection feature is not used and DUVR mode is enabled in reset, the
External Protection input must be held low until disabled by SW.
It is recommended that the external interrupt on the External Protection Input port is configured
to ‘any edge’ to generate an interrupt to the microcontroller when using this feature, indicating
that the FET protection status has changed. By reading the pin register, the External Protection
status can be determined. If the pin register is set, it means that External Protection is trigged
and the FET control signals in FCSR (CFE, DFE and DUVRD) are overridden and the FETs are
disabled. In the opposite case, External Protection violation is not present.
To ensure a safe exit from the External Protection Input condition, the FETs and DUVR mode
should be disabled by SW when an External Protection condition is detected. This enables soft-
ware to completely control when the FETs are switched ON again.
Short pulses on the EXTPROT pin, for instance caused by temporary high voltages on the BATT
pin when connecting a charger, may trigger the External Protection Input (refer to
Circuit” on page
re-enabled automatically once the External Protection condition disappears.
Figure 24-1. External Protection Input example.
INT0
FC SR [CFE]
FC SR [DFE]
PC 0
O C
O D
225). However if the SW does not take any action, the C-FET and D-FET will be
ATmega16HVB/32HVB
”Operating
138
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