STEVAL-ISQ002V1 STMicroelectronics, STEVAL-ISQ002V1 Datasheet - Page 127
![BOARD EVAL BASED ON ST72264G1](/photos/9/9/90917/steval-isq002v1_sml.jpg)
STEVAL-ISQ002V1
Manufacturer Part Number
STEVAL-ISQ002V1
Description
BOARD EVAL BASED ON ST72264G1
Manufacturer
STMicroelectronics
Specifications of STEVAL-ISQ002V1
Main Purpose
Interface, PMBus
Embedded
Yes, MCU, 8-Bit
Utilized Ic / Part
ST72F264
Primary Attributes
The PMBus™ Interface Using the ST7 I2C Peripheral
Secondary Attributes
Firmware in C Language
Product
Power Management Modules
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-6423
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
STEVAL-ISQ002V1
Manufacturer:
STMicroelectronics
Quantity:
1
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13.2 ABSOLUTE MAXIMUM RATINGS
Stresses above those listed as “absolute maxi-
mum ratings” may cause permanent damage to
the device. This is a stress rating only and func-
tional operation of the device under these condi-
13.2.1 Voltage Characteristics
13.2.2 Current Characteristics
13.2.3 Thermal Characteristics
Notes:
1. Directly connecting the I/O pins to V
tion occurs (for example, due to a corrupted program counter). To guarantee safe operation, this connection has to be
done through a pull-up or pull-down resistor (typical: 10kΩ for I/Os). Unused I/O pins must be tied in the same way to V
or V
2. I
respected, the injection current must be limited externally to the I
while a negative injection is induced by V
corresponding V
3. All power (V
4. Negative injection disturbs the analog performance of the device. See note in
page
5. When several inputs are submitted to a current injection, the maximum ΣI
and negative injected currents (instantaneous values). These results are based on characterisation with ΣI
mum current injection on four I/O port pins of the device.
6. True open drain I/O port pins do not accept positive injection.
INJ(PIN)
SS
I
157. For best reliability, it is recommended to avoid negative injection of more than 1.6mA.
INJ(PIN)
ΣI
V
according to their reset configuration. For reset pin, please refer to
V
V
Symbol
Symbol
Symbol
ESD(HBM)
DD
INJ(PIN)
ESD(MM)
T
I
I
V
VDD
VSS
must never be exceeded. This is implicitly insured if V
I
STG
T
IO
- V
IN
J
2) & 4)
DD
SS
2)
IN
) and ground (V
maximum must always be respected.
Supply voltage
Input voltage on any pin
Electrostatic discharge voltage (Human Body Model)
Electrostatic discharge voltage (Machine Model)
Total current into V
Total current out of V
Output current sunk by any standard I/O and control pin
Output current sunk by any high sink I/O pin
Output current source by any I/Os and control pin
Injected current on Flash device pins PB0 and PB1
Injected current on RESET pin
Injected current on OSC1 and OSC2 pins
Injected current on any other pin
Total injected current (sum of all I/O and control pins)
Storage temperature range
Maximum junction temperature (see
Package" on page
SS
) lines must always be connected to the external supply.
DD
IN
or V
<V
160)
DD
SS
SS
SS
. For true open-drain pads, there is no positive injection current, and the
power lines (source)
could damage the device if an unexpected change of the I/O configura-
Ratings
Ratings
Ratings
ground lines (sink)
1) & 2)
5) & 6)
Section Figure 104. "Low Profile Fine Pitch Ball Grid Array
tions is not implied. Exposure to maximum rating
conditions for extended periods may affect device
reliability.
INJ(PIN)
IN
maximum is respected. If V
ST72260Gx, ST72262Gx, ST72264Gx
3)
3)
value. A positive injection is induced by V
Figure 91
INJ(PIN)
5)
“10-BIT ADC CHARACTERISTICS” on
see
and
is the absolute sum of the positive
V
Maximum value
Maximum value
SS
Section 13.7.3 on page 142
-0.3 to V
-65 to +150
Figure
Value
± 20
100
150
- 25
6.5
+ 5
± 5
± 5
± 5
25
50
92.
IN
DD
maximum cannot be
+0.3
INJ(PIN)
Unit
Unit
Unit
127/172
mA
°C
IN
V
maxi-
>V
DD
DD
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