LMH1982SQEEVAL National Semiconductor, LMH1982SQEEVAL Datasheet - Page 14

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LMH1982SQEEVAL

Manufacturer Part Number
LMH1982SQEEVAL
Description
BOARD EVAL FOR LMH1982SQE
Manufacturer
National Semiconductor

Specifications of LMH1982SQEEVAL

Main Purpose
Video, Video Processing
Utilized Ic / Part
LMH1982SQE
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Secondary Attributes
-
Embedded
-
Primary Attributes
-
the LVDS output pair into high impedance (Hi-Z) mode. The default output frequencies and
output modes are shown in the figure below.
IMPORTANT: If 148.35 MHz is selected as the HD clock, it is recommended to follow the
initial programming sequence described in the LMH1982 datasheet section titled,
“RECOMMENDED START-UP PROGRAMMING SEQUENCE.”
5.3.5 Top of Frame Output Control
This panel allows you to program the output TOF timing characteristics. The default values are
set up for the NTSC output timing format. Refer to the LMH1982 datasheet for detailed
descriptions on programming the output format registers.
The TOF Reset and Initialization panel contains two buttons, Enable TOF Reset and TOF Init.
The dedicated WRITE button can be used instead of the WRITE ALL button to program
the two buttons inside the TOF Reset and Initialization panel. Programming a button value
of 1 for Enable TOF Reset allows the TOF reset circuit to be enabled; otherwise, the reset circuit
will be disabled. Programming the button value for TOF Init from 0 to 1 produces a rising edge
for resetting the TOF Reset Counter. This bit should be pulsed during the output frame
immediately prior to the frame the reset it to occur.
NOTE: For applications where the TOF output is not used and only the output clocks are
required, Enable TOF Reset should be set to 0 to disconnect the internal TOF reset circuit from
the internal PLL; otherwise, the internal TOF reset circuit can periodically reset the PLLs and
consequently disturb output clocks. It is also recommended to set Enable TOF Reset to 0 when a
reference is applied without an associated V signal, such as a 27 MHz or 48 kHz clock.
Furthermore, when the TOF output is not used, the TOF output mode should be set to disabled,
which will put the TOF output pin into high impedance (Hi-Z) mode.
The polarity of the output TOF pulse can be selected by changing the value of TOF Pulse
Polarity button. A button value of 0 (default) corresponds to negative polarity and a value of 1
corresponds to positive polarity.
National Semiconductor Corp.
Rev. 2.1, 5/13/2008
Page 14 of 20

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