SI5110-EVB Silicon Laboratories Inc, SI5110-EVB Datasheet
SI5110-EVB
Specifications of SI5110-EVB
Related parts for SI5110-EVB
SI5110-EVB Summary of contents
Page 1
... Loopback Motherboard (included) provides hardware path between low-speed parallel data outputs RXDOUT and low-speed parallel data inputs TXDIN. motherboard ! Optional full-duplex motherboard provides access to between the all low-speed parallel data outputs and inputs via SMA connectors. The full-duplex Copyright © 2003 by Silicon Laboratories Si5100/Si5110-EVB-05 ...
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... Si5100/Si5110-EVB Motherboard/Daughter Card Set Testpoints Pow er Connectors SMA Connectors for Parallel Interface Clock signals Daughter Card 2 300-Pin Meg-Array Connector 2.5 Gbps Interface SMA Connectors Preliminary Rev. 0.5 Control Input Headers Status Header & LEDs 2.5 GHz transmit clock output ...
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... GND Figure 1. Loopback Motherboard Functional Block Diagram TXDIN15 TXDIN1 TXDIN0 TXREFCLK 3.3V 1.8V GND Figure 2. Optional Full-Duplex Motherboard Functional Block Diagram Preliminary Rev. 0.5 Si5100/Si5110-EVB Testpoints TXDIN Bus 300-Pin MSA Connector Status Ouputs 300-Pin MSA Connector RXCLK2 RXCLK1 RXREFCLK Control Inputs ...
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... Si5100/Si5110-EVB RXDOUT 16 pairs RESET_N RXCLK2DSBL_N RXCLK2DIV_N LPTM_N FIFOERR_N FIFORST_N Other Input Signals Other Ouput Signals Figure 3. Daughter Card Functional Block Diagram 4 300-Pin MSA Connector 3.3 V 1.8 V TXDIN 16 pairs VDD VDD33 Si5100/Si5110 RXDIN TXCLKOUT TXDOUT Preliminary Rev. 0.5 Control Inputs Status Ouputs ...
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... R16 sets the voltage applied to the SLICELVL pin; R14 sets the voltage applied to the LOSLVL pin, and R15 sets the voltage applied to the PHASEADJ pin. The Si5110-EVB also provides 50 kΩ potentiometers for each of these inputs. Potentiometer R5 sets the voltage applied to the SLICELVL pin; R3 sets the voltage applied to the LOSLVL pin, and R4 sets the voltage applied to the PHASEADJ pin ...
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... Si5100/Si5110-EVB Line Loopback When configured in line-loopback mode, the device passes the received/recovered data and timing to the transmitter. The transmitter buffers the data through the FIFO and filters the jitter using the loop-bandwidth selected by BWSEL[1:0]. Operation in line loopback mode is depicted in Figure 5. Jumper settings for line loopback mode are given in Tables 1, 3 (Si5100), and 4 (Si5110) ...
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... Asynchronous TX/RX 11 (for widest CMU loop bandwidth) bandwidth) high high high high low low high high low Preliminary Rev. 0.5 Si5100/Si5110-EVB Asynchronous TX/RX 3.3 V high high high don’t care don’t care high high high high high open high tie to FIFOERR Diagnostic Loopback 3 ...
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... Si5100/Si5110-EVB Header—Pin Signal Name JP1—20 BWSEL0 BWSEL1 (for widest CMU loop JP1—23 JP1—17 REFSEL JP1—14 TXCLKDSBL JP1—11 TXMSBSEL JP1—8 TXSQLCH_N JP1—5 SLICEMODE JP1—2 RXMSBSEL Note: Jump the VDD_IO selection jumper toward the 3.3 V side. ...
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... VDD13 E7 VDD12 K6 VDD11 J6 VDD10 H6 VDD9 G6 VDD8 F6 VDD7 E6 VDD6 K5 VDD5 J5 VDD4 H5 VDD3 G5 VDD2 F5 VDD1 E5 VDD_33 H3 Si5100/Si5110-EVB Preliminary Rev. 0.5 GND39 L11 GND38 K11 GND37 J11 GND36 H11 GND35 G11 GND34 F11 GND33 E11 GND32 D11 GND31 L10 GND30 D10 GND29 L9 GND28 D9 GND27 L8 ...
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... Si5100/Si5110-EVB 10 Preliminary Rev. 0.5 ...
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... Si5100/Si5110-EVB Preliminary Rev. 0 ...
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... Si5100/Si5110-EVB Bill of Materials: Si5100-EVB Daughter Card Assembly Revision D-01 Si5100EVB Assy Rev D-01 BOM Reference Description C1,C2,C3,C4,C5,C6 CAP, SM, 0.033 uF, 0402 C7,C8,C9,C15,C16,C17, CAP, SM, 0.1 uF, 0402 C21,C22,C27,C29,C31 C10,C11,C12,C23,C24 CAP, SM, 100 pF, 0402 C14,C13 CAP, SM, 10 uF, TANTALUM, 3216 C18,C19 CAP, SM, 0.1 uF, 0603 C25,C26,C28,C30 CAP,SM,4.7UF,6.3V,X7R,0805 JP1 ...
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... VDD14 G7 VDD13 G6 VDD12 G5 VDD11 G4 VDD10 F6 VDD9 F5 VDD8 F4 VDD7 E6 VDD6 E5 VDD5 E4 VDD4 D7 VDD3 D6 VDD2 D5 VDD1 D4 VDD_33 G2 Si5100/Si5110-EVB GND15 K1 GND14 J2 GND13 H2 GND12 G1 GND11 F9 GND10 F8 GND9 F7 GND8 F2 GND7 E9 GND6 E8 GND5 E7 GND4 E2 GND3 D1 GND2 C2 GND1 B2 Preliminary Rev. 0.5 13 ...
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... Si5100/Si5110-EVB 14 Preliminary Rev. 0.5 ...
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... Si5100/Si5110-EVB Preliminary Rev. 0.5 15 ...
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... Si5100/Si5110-EVB Bill of Materials: Si5110-EVB Daughter Card Assembly Revision D-01 Si5110 EVB Daughter Card Assy Rev. E-01 BOM Reference Part Desc C1,C2,C3,C4,C5,C6,C7,C8 CAP,SM,0.1UF,16V,10%,X7R,0402 C11,C12,C13,C21,C22,C23 C24 C9,C10,C29,C30 CAP,SM,4.7UF,6.3V,X7R,0805 C14,C25,C26,C27,C28 CAP,SM,100PF,50V,5%,C0G,0402 C15,C16 CAP,SM,10UF,10V,10%,TANTALUM,3216 C17,C18,C19,C20 CAP,SM,0.1UF,16V,20%,X7R,0603 JP1 CONN,HEADER,8X3 JP5 CONN,HEADER,3X1 JP4,JP6,JP7,JP8,JP9 ...
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... DATA12+ DATA12- DATA13+ DATA13- DATA14+ DATA14- DATA15+ DATA15- DATA8+ DATA8- DATA9+ DATA9- DATA10+ DATA10- DATA11+ DATA11- Preliminary Rev. 0.5 Si5100/Si5110-EVB 17 ...
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... Si5100/Si5110-EVB DATA4+ DATA4- DATA5+ DATA5- DATA6+ DATA6- DATA7+ DATA7- DATA0+ DATA0- DATA1+ DATA1- DATA2+ DATA2- DATA3+ DATA3- 18 Preliminary Rev. 0.5 ...
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... R5,R6,R7,R8,R9,R10,R11, RES,SM,0,0402 R12,R13,R14,R15,R16 TP1,TP2,TP3,TP4,TP5,TP6, TEST POINTS ON PCB TP7,TP8,TP9,TP10,TP11, TP12,TP13,TP14,TP15,TP16, TP17,TP18,TP19,TP20,TP21, TP22,TP23,TP24,TP25,TP26, TP27,TP28,TP29,TP30,TP31, TP32 U1 IC,SM,74LCX244,20TSSOP PCB Printed Circuit Board Si5100/Si5110-EVB Part Number C0402X7R160-104KNE C0402C0G500-101JNE LN1271RAL-TR 2380-6121TN or 2340-6111TN 2380-6121TN or 2340-6111TN 2380-6121TN or 2340-6111TN 2380-6121TN or 2340-6111TN 2380-6121TN or 2340-6111TN 2380-6121TN or 2340-6111TN 2380-6121TN or 2340-6111TN 84500-02 142-0711-201 1729021 ...
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... Si5100/Si5110-EVB 20 Preliminary Rev. 0.5 ...
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... Si5100/Si5110-EVB Preliminary Rev. 0.5 21 ...
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... Si5100/Si5110-EVB Bill of Materials: Full-Duplex Motherboard Assembly Revision C-01 Si5100 Motherboard Assy Rev C-01 BOM Reference Part Desc R1,R2,R3,R4,R5,R6,R7,R8, RES,SM,0,0402 R9,R10,R11,R12,R13,R14, R15,R16,R17,R18,R19,R20, R21,R22,R23,R24,R25,R26, R27,R28,R29,R30,R31,R32, R33,R34,R35,R36,R37,R38, R39,R40,R41,R42,R43,R44, R45,R46,R47,R48,R49,R50, R51,R52,R53,R54,R55,R56, R57,R58,R59,R60,R61,R62, R63,R64,R65,R66,R67,R68, R69,R70,R71,R72,R73,R74, R75,R76 JP1 CONNECTOR,HEADER,5X3 JP2,JP4,JP7 CONNECTOR,HEADER,3X2 JP3 CONNECTOR,HEADER,3X3 JP5 CONNECTOR,HEADER,2X1 JP6 CONNECTOR,HEADER,3X1 ...
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... Figure 18. Si5100-EVB Component Side Assembly (Daughter Card) Figure 19. Si5100-EVB Solder Side Assembly (Daughter Card) Preliminary Rev. 0.5 Si5100/Si5110-EVB 23 ...
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... Si5100/Si5110-EVB Figure 20. Si5100-EVB Layer 1—Component Side (Daughter Card) Figure 21. Si5100-EVB Layer 2—GND1 Plane (Daughter Card) 24 Preliminary Rev. 0.5 ...
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... Figure 22. Si5100-EVB Layer 3—Signal Plane (Daughter Card) Figure 23. Si5100-EVB Layer 4—GND2 Plane (Daughter Card) Preliminary Rev. 0.5 Si5100/Si5110-EVB 25 ...
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... Si5100/Si5110-EVB Figure 24. Si5100-EVB Layer 5—VDD Plane (Daughter Card) Figure 25. Si5100-EVB Layer 6—Signal Plane (Daughter Card) 26 Preliminary Rev. 0.5 ...
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... Figure 26. Si5100-EVB Layer 7—GND3 Plane (Daughter Card) Figure 27. Si5100-EVB Layer 8—Solder Side (Daughter Card) Preliminary Rev. 0.5 Si5100/Si5110-EVB 27 ...
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... Si5100/Si5110-EVB Figure 28. Si5110-EVB Component Side Assembly (Daughter Card) Figure 29. Si5110-EVB Solder Side Assembly (Daughter Card) 28 Preliminary Rev. 0.5 ...
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... Figure 30. Si5110-EVB Layer 1—Component Side (Daughter Card) Figure 31. Si5110-EVB Layer 2—GND1 Plane (Daughter Card) Preliminary Rev. 0.5 Si5100/Si5110-EVB 29 ...
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... Si5100/Si5110-EVB Figure 32. Si5110-EVB Layer 3—Signal Plane (Daughter Card) Figure 33. Si5110-EVB Layer 4—GND2 Plane (Daughter Card) 30 Preliminary Rev. 0.5 ...
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... Figure 34. Si5110-EVB Layer 5—VDD Plane (Daughter Card) Figure 35. Si5110-EVB Layer 6—Signal Plane (Daughter Card) Preliminary Rev. 0.5 Si5100/Si5110-EVB 31 ...
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... Si5100/Si5110-EVB Figure 36. Si5110-EVB Layer 7—GND3 Plane (Daughter Card) Figure 37. Si5110-EVB Layer 8—Solder Side (Daughter Card) 32 Preliminary Rev. 0.5 ...
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... Figure 38. Component Side Assembly (Loopback Motherboard) Preliminary Rev. 0.5 Si5100/Si5110-EVB 33 ...
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... Si5100/Si5110-EVB Figure 39. Layer 1—Component Side (Loopback Motherboard) 34 Preliminary Rev. 0.5 ...
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... Figure 40. Layer 2—GND1 Plane (Loopback Motherboard) Preliminary Rev. 0.5 Si5100/Si5110-EVB 35 ...
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... Si5100/Si5110-EVB Figure 41. Layer 3—Signal 1 Plane (Loopback Motherboard) 36 Preliminary Rev. 0.5 ...
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... Figure 42. Layer 4—Signal 2 Plane (Loopback Motherboard) Preliminary Rev. 0.5 Si5100/Si5110-EVB 37 ...
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... Si5100/Si5110-EVB Figure 43. Layer 5—GND2 Plane (Loopback Motherboard) 38 Preliminary Rev. 0.5 ...
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... Figure 44. Layer 6—Solder Side (Loopback Motherboard) Preliminary Rev. 0.5 Si5100/Si5110-EVB 39 ...
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... Si5100/Si5110-EVB Figure 45. Component Side Assembly (Optional Full-Duplex Motherboard) 40 Preliminary Rev. 0.5 ...
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... Figure 46. Layer 1—Component Side (Optional Full-Duplex Motherboard) Preliminary Rev. 0.5 Si5100/Si5110-EVB 41 ...
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... Si5100/Si5110-EVB Figure 47. Layer 2—GND1 Plane (Optional Full-Duplex Motherboard) 42 Preliminary Rev. 0.5 ...
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... Figure 48. Layer 3—Signal 1 Plane (Optional Full-Duplex Motherboard) Preliminary Rev. 0.5 Si5100/Si5110-EVB 43 ...
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... Si5100/Si5110-EVB Figure 49. Layer 4—Signal 2 Plane (Optional Full-Duplex Motherboard) 44 Preliminary Rev. 0.5 ...
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... Figure 50. Layer 5—GND2 Plane (Optional Full-Duplex Motherboard) Preliminary Rev. 0.5 Si5100/Si5110-EVB 45 ...
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... Si5100/Si5110-EVB Figure 51. Layer 6—Solder Side (Optional Full-Duplex Motherboard) 46 Preliminary Rev. 0.5 ...
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... B-01 Rev. B C-01 Rev. C Loopback Motherboard Revision History Assembly Level PCB A-01 Rev. A Si5100/Si5110-EVB Si5600 Device Rev. C Assemble per BOM rev C-01 Rev. D Assemble per BOM rev D-01 Assembly Notes Assemble per BOM rev A-01 Assemble per BOM rev B-01 Assemble per BOM rev C-01 ...
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... Si5100/Si5110-EVB Contact Information Silicon Laboratories Inc. 4635 Boston Lane Austin, TX 78735 Tel: 1+(512) 416-8500 Fax: 1+(512) 416-9669 Toll Free: 1+(877) 444-3032 Email: productinfo@silabs.com Internet: www.silabs.com The information in this document is believed to be accurate in all respects at the time of publication but is subject to change without notice. ...