KDC5612EVAL Intersil, KDC5612EVAL Datasheet - Page 3

• Manufacturer Part Number: KDC5612EVAL
• Description: DAUGHTER CARD FOR KAD5612
• Manufacturer: Intersil
• Series: FemtoCharge™r

Specifications of KDC5612EVAL

• Number Of Adc's: 2
• Number Of Bits: 12
• Sampling Rate (per Second): 250M
• Data Interface: Parallel
• Inputs Per Adc: 1 Differential
• Input Range: 1.47 Vpp
• Power (typ) @ Conditions: 429mW @ 250MSPS
• Voltage Supply Source: Single Supply
• Operating Temperature: -40°C ~ 85°C
• Utilized Ic / Part: KAD5612P-25, KMB001 Motherboard
• For Use With: KMB001LEVAL - MOTHERBOARD FOR LVDS ADC CARD
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table of Contents
Absolute Maximum Ratings ......................................... 4
Thermal Information...................................................... 4
Electrical Specifications ............................................... 4
Digital Specifications .................................................... 6
Timing Diagrams ........................................................... 7
Switching Specifications .............................................. 7
Pinout/Package Information......................................... 8
Typical Performance Curves ........................................ 11
Theory of Operation ...................................................... 14
Pin Descriptions.......................................................... 8
Pinout ......................................................................... 10
Functional Description ................................................ 14
Power-On Calibration ................................................. 14
User-Initiated Reset.................................................... 15
Analog Input ............................................................... 15
Clock Input ................................................................. 16
Jitter............................................................................ 17
Voltage Reference...................................................... 17
Digital Outputs ............................................................ 17
Over Range Indicator ................................................. 17
Power Dissipation....................................................... 17
Nap/Sleep................................................................... 17
Data Format ............................................................... 18
3
KAD5612P
Serial Peripheral Interface ........................................... 19
Equivalent Circuits ....................................................... 25
ADC Evaluation Platform ............................................. 26
Layout Considerations................................................. 26
Definitions ..................................................................... 27
Revision History ........................................................... 28
Package Outline Drawing............................................... 29
L72.10x10D................................................................... 29
SPI Physical Interface................................................ 19
SPI Configuration....................................................... 21
Device Information ..................................................... 21
Indexed Device Configuration/Control ....................... 21
Global Device Configuration/Control.......................... 22
Device Test ................................................................ 23
SPI Memory Map ....................................................... 24
Split Ground and Power Planes................................. 26
Clock Input Considerations ........................................ 26
Exposed Paddle......................................................... 26
Bypass and Filtering .................................................. 26
LVDS Outputs ............................................................ 27
LVCMOS Outputs ...................................................... 27
Unused Inputs............................................................ 27
September 9, 2009
FN6803.2